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Solved conflicts
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abisca committed Nov 19, 2024
2 parents 3e108d7 + 7b79747 commit 2246ad9
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Showing 3 changed files with 26 additions and 14 deletions.
32 changes: 20 additions & 12 deletions lib/Dialect/AIE/Transforms/AIEObjectFifoStatefulTransform.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -81,23 +81,26 @@ class DMAChannelAnalysis {
Region &r = memOp.getBody();
for (auto &bl : r.getBlocks()) {
for (auto op : bl.getOps<DMAStartOp>()) {
channelsPerTile[{memOp.getTile(), op.getChannelDir(), op.getChannelIndex()}] = 1;
channelsPerTile[{memOp.getTile(), op.getChannelDir(),
op.getChannelIndex()}] = 1;
}
}
}
for (auto memOp : device.getOps<MemTileDMAOp>()) {
Region &r = memOp.getBody();
for (auto &bl : r.getBlocks()) {
for (auto op : bl.getOps<DMAStartOp>()) {
channelsPerTile[{memOp.getTile(), op.getChannelDir(), op.getChannelIndex()}] = 1;
channelsPerTile[{memOp.getTile(), op.getChannelDir(),
op.getChannelIndex()}] = 1;
}
}
}
for (auto memOp : device.getOps<ShimDMAOp>()) {
Region &r = memOp.getBody();
for (auto &bl : r.getBlocks()) {
for (auto op : bl.getOps<DMAStartOp>()) {
channelsPerTile[{memOp.getTile(), op.getChannelDir(), op.getChannelIndex()}] = 1;
channelsPerTile[{memOp.getTile(), op.getChannelDir(),
op.getChannelIndex()}] = 1;
}
}
}
Expand All @@ -109,11 +112,14 @@ class DMAChannelAnalysis {
const auto &targetModel = getTargetModel(tileOp);
int maxChannelNum = 0;
if (dir == DMAChannelDir::MM2S)
maxChannelNum = targetModel.getNumSourceSwitchboxConnections(tileOp.getCol(), tileOp.getRow(), WireBundle::DMA);
maxChannelNum = targetModel.getNumSourceSwitchboxConnections(
tileOp.getCol(), tileOp.getRow(), WireBundle::DMA);
else
maxChannelNum = targetModel.getNumDestSwitchboxConnections(tileOp.getCol(), tileOp.getRow(), WireBundle::DMA);
maxChannelNum = targetModel.getNumDestSwitchboxConnections(
tileOp.getCol(), tileOp.getRow(), WireBundle::DMA);
for (int i = 0; i < maxChannelNum; i++)
if (int usageCnt = channelsPerTile[{tileOp.getResult(), dir, i}]; usageCnt == 0) {
if (int usageCnt = channelsPerTile[{tileOp.getResult(), dir, i}];
usageCnt == 0) {
channelsPerTile[{tileOp.getResult(), dir, i}] = 1;
return i;
}
Expand Down Expand Up @@ -1526,10 +1532,11 @@ struct AIEObjectFifoStatefulTransformPass
// rely on shared memory and share the same buffers.
for (auto &[producer, consumers] : splitFifos) {
// create producer tile DMA
int producerChanIndex =
dmaAnalysis.getDMAChannelIndex(producer.getProducerTileOp(), DMAChannelDir::MM2S);
int producerChanIndex = dmaAnalysis.getDMAChannelIndex(
producer.getProducerTileOp(), DMAChannelDir::MM2S);
if (producerChanIndex == -1)
producer.getProducerTileOp().emitOpError("number of output DMA channel exceeded!");
producer.getProducerTileOp().emitOpError(
"number of output DMA channel exceeded!");
DMAChannel producerChan = {DMAChannelDir::MM2S, producerChanIndex};
createDMA(device, builder, producer, producerChan.direction,
producerChan.channel, 0, producer.getDimensionsToStreamAttr(),
Expand All @@ -1546,10 +1553,11 @@ struct AIEObjectFifoStatefulTransformPass
for (auto consumer : consumers) {

// create consumer tile DMA
int consumerChanIndex =
dmaAnalysis.getDMAChannelIndex(consumer.getProducerTileOp(), DMAChannelDir::S2MM);
int consumerChanIndex = dmaAnalysis.getDMAChannelIndex(
consumer.getProducerTileOp(), DMAChannelDir::S2MM);
if (consumerChanIndex == -1)
consumer.getProducerTileOp().emitOpError("number of input DMA channel exceeded!");
consumer.getProducerTileOp().emitOpError(
"number of input DMA channel exceeded!");
DMAChannel consumerChan = {DMAChannelDir::S2MM, consumerChanIndex};
BDDimLayoutArrayAttr consumerDims =
consumer.getDimensionsFromStreamPerConsumer()[0];
Expand Down
4 changes: 3 additions & 1 deletion test/npu-xrt/adjacent_memtile_access/three_memtiles/aie2.py
Original file line number Diff line number Diff line change
Expand Up @@ -182,7 +182,9 @@ def core_body():
use_lock(in1_cons_cons_lock, LockAction.AcquireGreaterEqual)
use_lock(out_prod_lock, LockAction.AcquireGreaterEqual)
for i in range_(n):
out_buff_0[i] = in2_mem_cons_buff_0[j * N_div_n + i] + in1_cons_buff_0[i]
out_buff_0[i] = (
in2_mem_cons_buff_0[j * N_div_n + i] + in1_cons_buff_0[i]
)
use_lock(in1_cons_prod_lock, LockAction.Release)
use_lock(out_cons_lock, LockAction.Release)
use_lock(in2_mem_cons_prod_lock, LockAction.Release)
Expand Down
4 changes: 3 additions & 1 deletion test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py
Original file line number Diff line number Diff line change
Expand Up @@ -155,7 +155,9 @@ def core_body():
use_lock(in1_cons_cons_lock, LockAction.AcquireGreaterEqual)
use_lock(out_prod_lock, LockAction.AcquireGreaterEqual)
for i in range_(n):
out_buff_0[i] = in2_mem_cons_buff_0[j * N_div_n + i] + in1_cons_buff_0[i]
out_buff_0[i] = (
in2_mem_cons_buff_0[j * N_div_n + i] + in1_cons_buff_0[i]
)
use_lock(in1_cons_prod_lock, LockAction.Release)
use_lock(out_cons_lock, LockAction.Release)
use_lock(in2_mem_cons_prod_lock, LockAction.Release)
Expand Down

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