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backend: (riscv) Exclude FP registers from RISC-V regalloc in the presence of snitch_stream IO ops #6735

backend: (riscv) Exclude FP registers from RISC-V regalloc in the presence of snitch_stream IO ops

backend: (riscv) Exclude FP registers from RISC-V regalloc in the presence of snitch_stream IO ops #6735

Triggered via pull request November 15, 2023 14:17
Status Success
Total duration 3m 8s
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ci-mlir.yml

on: pull_request
Matrix: build
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