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feat: add possibility for custom CSRs
Currently in riscv-isa-sim there's no way to make a custom extension that adds new CSRs. This simple patch makes it possible via new virtual function in extension_t class.
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,81 @@ | ||
#include <riscv/extension.h> | ||
#include <riscv/sim.h> | ||
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class dummycsr_t: public csr_t { | ||
public: | ||
dummycsr_t(processor_t *proc, const reg_t addr): csr_t(proc, addr) {} | ||
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reg_t read() const noexcept override { | ||
return 42; | ||
} | ||
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void verify_permissions(insn_t insn, bool write) const override {} | ||
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protected: | ||
bool unlogged_write(const reg_t val) noexcept override { | ||
return true; | ||
} | ||
}; | ||
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// dummy extension with dummy CSRs. Nice. | ||
struct xdummycsr_t : public extension_t { | ||
const char *name() { return "dummycsr"; } | ||
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xdummycsr_t() {} | ||
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std::vector<insn_desc_t> get_instructions() override { | ||
return {}; | ||
} | ||
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std::vector<disasm_insn_t *> get_disasms() override { | ||
return {}; | ||
} | ||
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std::vector<csr_t_p> get_csrs(processor_t &proc) const override { | ||
return {std::make_shared<dummycsr_t>(&proc, /*Addr*/ 0xfff)}; | ||
} | ||
}; | ||
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REGISTER_EXTENSION(dummycsr, []() { return new xdummycsr_t; }) | ||
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// Copied from spike main. | ||
// TODO: This should really be provided in libriscv | ||
static std::vector<std::pair<reg_t, abstract_mem_t *>> | ||
make_mems(const std::vector<mem_cfg_t> &layout) { | ||
std::vector<std::pair<reg_t, abstract_mem_t *>> mems; | ||
mems.reserve(layout.size()); | ||
for (const auto &cfg : layout) { | ||
mems.push_back(std::make_pair(cfg.get_base(), new mem_t(cfg.get_size()))); | ||
} | ||
return mems; | ||
} | ||
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int main(int argc, char **argv) { | ||
cfg_t cfg; | ||
cfg.isa = "RV64IMAFDCV_Zicsr_xdummycsr"; | ||
std::vector<device_factory_sargs_t> plugin_devices; | ||
if (argc != 3) { | ||
std::cerr << "Error: invalid arguments\n"; | ||
exit(1); | ||
} | ||
std::vector<std::string> htif_args{argv[1] /* pk */, argv[2] /* executable */}; | ||
debug_module_config_t dm_config = {.progbufsize = 2, | ||
.max_sba_data_width = 0, | ||
.require_authentication = false, | ||
.abstract_rti = 0, | ||
.support_hasel = true, | ||
.support_abstract_csr_access = true, | ||
.support_abstract_fpr_access = true, | ||
.support_haltgroups = true, | ||
.support_impebreak = true}; | ||
std::vector<std::pair<reg_t, abstract_mem_t *>> mems = | ||
make_mems(cfg.mem_layout); | ||
sim_t sim(&cfg, false, mems, plugin_devices, htif_args, dm_config, | ||
nullptr, // log_path | ||
true, // dtb_enabled | ||
nullptr, // dtb_file | ||
false, // socket_enabled | ||
nullptr); // cmd_file | ||
sim.run(); | ||
} |
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Original file line number | Diff line number | Diff line change |
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#include <stdio.h> | ||
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int main() { | ||
int x = 1; | ||
// dummycsr | ||
asm("csrr %0, 0xfff" : "=r"(x)); | ||
if (x == 42) | ||
printf("Executed successfully\n"); | ||
else | ||
printf("FAIL. Got value: %d instead of 42\n", x); | ||
return 0; | ||
} |
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