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[GPU] Address clang-tidy complaints #2431

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Jan 26, 2025
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4 changes: 2 additions & 2 deletions src/gpu/generic/ref_sum.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2019-2024 Intel Corporation
* Copyright 2019-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -40,7 +40,7 @@ struct ref_sum_t : public gpu::primitive_t {
using gpu_sum_pd_t::gpu_sum_pd_t;

pd_t(const pd_t &rhs) = default;
~pd_t() = default;
~pd_t() override = default;

DECLARE_SUM_PD_T("ref:any", ref_sum_t);

Expand Down
4 changes: 2 additions & 2 deletions src/gpu/gpu_binary_list.cpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2021-2024 Intel Corporation
* Copyright 2021-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -42,7 +42,7 @@ namespace {

// clang-format off
constexpr impl_list_item_t impl_list[] = REG_BINARY_P({
GPU_INSTANCE_INTEL(intel::ocl::multi_po_reorder_binary)
GPU_INSTANCE_INTEL(intel::ocl::multi_po_reorder_binary_t)
GPU_INSTANCE_INTEL(intel::ocl::gen9_binary_t)
GPU_INSTANCE_INTEL(intel::ocl::simple_binary_t)
GPU_INSTANCE_NVIDIA(nvidia::cudnn_binary_t)
Expand Down
4 changes: 2 additions & 2 deletions src/gpu/gpu_inner_product_pd.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2019-2023 Intel Corporation
* Copyright 2019-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -73,7 +73,7 @@ inline bool dense_gemm_consistency_check(const memory_desc_wrapper &src_d,
&& src_d.is_dense(true) && dst_d.is_dense() && wei_d.is_dense(true);
}

status_t template_set_default_params(memory_desc_t &src_md,
inline status_t template_set_default_params(memory_desc_t &src_md,
memory_desc_t &weights_md, memory_desc_t &dst_md,
memory_desc_t *bias_md, int ndims, bool is_conv = false) {
using namespace format_tag;
Expand Down
4 changes: 2 additions & 2 deletions src/gpu/gpu_sum_list.cpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2019-2024 Intel Corporation
* Copyright 2019-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -49,7 +49,7 @@ namespace {

// clang-format off
constexpr impl_list_item_t impl_list[] = REG_SUM_P({
GPU_SUM_INSTANCE_INTEL(intel::ocl::multi_po_reorder_sum)
GPU_SUM_INSTANCE_INTEL(intel::ocl::multi_po_reorder_sum_t)
GPU_SUM_INSTANCE_INTEL(intel::ocl::gen9_sum_t)
GPU_SUM_INSTANCE_INTEL(intel::ocl::many_inputs_sum_t)
GPU_SUM_INSTANCE_INTEL(intel::ocl::simple_sum_t<data_type::f32>)
Expand Down
17 changes: 8 additions & 9 deletions src/gpu/gpu_utils.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -75,10 +75,10 @@ class scales_query_t {
scales_query_t() = default;
scales_query_t(const primitive_attr_t *attr, const memory_desc_wrapper &mdw,
int arg)
: arg_(arg), ndims_(mdw.ndims()) {
scales_ = attr->scales_.get(arg);
count_ = get_attr_oscales_count(scales_.mask_, mdw);
}
: scales_(attr->scales_.get(arg))
, count_(get_attr_oscales_count(scales_.mask_, mdw))
, arg_(arg)
, ndims_(mdw.ndims()) {}

private:
runtime_scales_t scales_;
Expand Down Expand Up @@ -123,11 +123,10 @@ class zero_points_query_t {
zero_points_query_t() = default;
zero_points_query_t(const primitive_attr_t *attr,
const memory_desc_wrapper &mdw, int arg)
: arg_(arg), ndims_(mdw.ndims()) {
zps_ = attr->zero_points_;
int mask = zps_.get(arg);
count_ = get_attr_oscales_count(mask, mdw);
}
: zps_(attr->zero_points_)
, count_(get_attr_oscales_count(zps_.get(arg), mdw))
, arg_(arg)
, ndims_(mdw.ndims()) {}

private:
zero_points_t zps_;
Expand Down
4 changes: 2 additions & 2 deletions src/gpu/gpu_zero_pad_pd.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2020-2024 Intel Corporation
* Copyright 2020-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand All @@ -25,7 +25,7 @@ namespace gpu {

struct gpu_zero_pad_pd_t : public primitive_desc_t {
static constexpr auto base_pkind = primitive_kind::zero_pad;
typedef gpu_zero_pad_pd_t hint_class;
using hint_class = gpu_zero_pad_pd_t;

gpu_zero_pad_pd_t(const op_desc_t *adesc, const primitive_attr_t *attr,
const hint_class *hint_fwd_pd)
Expand Down
4 changes: 2 additions & 2 deletions src/gpu/intel/block_structure.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2021-2024 Intel Corporation
* Copyright 2021-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -99,7 +99,7 @@ class stride_t {

namespace compute {
template <>
struct scalar_type_traits<stride_t> {
struct scalar_type_traits_t<stride_t> {
static const auto type = scalar_type_t::_long;
};
} // namespace compute
Expand Down
34 changes: 17 additions & 17 deletions src/gpu/intel/compute/kernel_arg_list.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2019-2024 Intel Corporation
* Copyright 2019-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -103,56 +103,56 @@ inline std::string to_string(scalar_type_t type) {
}

template <typename T>
struct scalar_type_traits {};
struct scalar_type_traits_t {};

template <>
struct scalar_type_traits<float16_t> {
struct scalar_type_traits_t<float16_t> {
static const auto type = scalar_type_t::_half;
};
template <>
struct scalar_type_traits<bfloat16_t> {
struct scalar_type_traits_t<bfloat16_t> {
static const auto type = scalar_type_t::_bfloat16;
};
template <>
struct scalar_type_traits<float> {
struct scalar_type_traits_t<float> {
static const auto type = scalar_type_t::_float;
};
template <>
struct scalar_type_traits<double> {
struct scalar_type_traits_t<double> {
static const auto type = scalar_type_t::_double;
};

template <>
struct scalar_type_traits<uint8_t> {
struct scalar_type_traits_t<uint8_t> {
static const auto type = scalar_type_t::_uchar;
};
template <>
struct scalar_type_traits<uint16_t> {
struct scalar_type_traits_t<uint16_t> {
static const auto type = scalar_type_t::_ushort;
};
template <>
struct scalar_type_traits<uint32_t> {
struct scalar_type_traits_t<uint32_t> {
static const auto type = scalar_type_t::_uint;
};
template <>
struct scalar_type_traits<uint64_t> {
struct scalar_type_traits_t<uint64_t> {
static const auto type = scalar_type_t::_ulong;
};

template <>
struct scalar_type_traits<int8_t> {
struct scalar_type_traits_t<int8_t> {
static const auto type = scalar_type_t::_char;
};
template <>
struct scalar_type_traits<int16_t> {
struct scalar_type_traits_t<int16_t> {
static const auto type = scalar_type_t::_short;
};
template <>
struct scalar_type_traits<int32_t> {
struct scalar_type_traits_t<int32_t> {
static const auto type = scalar_type_t::_int;
};
template <>
struct scalar_type_traits<int64_t> {
struct scalar_type_traits_t<int64_t> {
static const auto type = scalar_type_t::_long;
};

Expand Down Expand Up @@ -184,7 +184,7 @@ class kernel_arg_t {
data_pool = static_cast<char *>(data_pool) + size_;
}
kind_ = kernel_arg_kind_t::scalar;
scalar_type_ = scalar_type_traits<T>::type;
scalar_type_ = scalar_type_traits_t<T>::type;
new (const_cast<void *>(value_)) T(value);
return *this;
}
Expand All @@ -211,7 +211,7 @@ class kernel_arg_t {
template <typename T>
T as() const {
assert(kind() == kernel_arg_kind_t::scalar);
assert(scalar_type() == scalar_type_traits<T>::type);
assert(scalar_type() == scalar_type_traits_t<T>::type);
return *(const T *)value();
}

Expand Down Expand Up @@ -308,7 +308,7 @@ class kernel_arg_list_t {
template <typename T>
void set_scalar_arg_cvt(kernel_arg_list_t &arg_list, int index, T scalar,
scalar_type_t requested_type) {
if (scalar_type_traits<T>::type == requested_type) {
if (scalar_type_traits_t<T>::type == requested_type) {
arg_list.set(index, scalar);
return;
}
Expand Down
4 changes: 2 additions & 2 deletions src/gpu/intel/compute/zero_pool.cpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2023-2024 Intel Corporation
* Copyright 2023-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -138,10 +138,10 @@ zero_pool_t::zero_pool_t(compute::compute_engine_t *engine, size_t chunk_size,
bool stream_private, bool in_order)
: engine_(engine)
, chunk_size_(chunk_size)
, chunk_count_(stream_private ? 1 : 16)
, stream_private_(stream_private)
, in_order_(in_order) {

chunk_count_ = stream_private ? 1 : 16;
assert(chunk_count_ <= max_chunks);
}

Expand Down
6 changes: 3 additions & 3 deletions src/gpu/intel/gpu_primitive.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2020-2024 Intel Corporation
* Copyright 2020-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -51,7 +51,7 @@ struct gpu_primitive_t : public gpu::primitive_t {
private:
bool empty_impl() const override { return !bool(kernel_); }

virtual status_t get_cache_blob_size_impl(
status_t get_cache_blob_size_impl(
impl::engine_t *engine, size_t *size) const override {
if (empty()) return status::success;
size_t sz = 0;
Expand All @@ -62,7 +62,7 @@ struct gpu_primitive_t : public gpu::primitive_t {
return status::success;
}

virtual status_t get_cache_blob_impl(
status_t get_cache_blob_impl(
impl::engine_t *engine, cache_blob_t &blob) const override {
if (empty()) return status::success;
xpu::binary_t binary;
Expand Down
12 changes: 5 additions & 7 deletions src/gpu/intel/jit/gemm/include/kernel_selector.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2022-2024 Intel Corporation
* Copyright 2022-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -52,7 +52,7 @@ struct MatchParamsBase
int nExtraReqs = 0;
const StrategyRequirement *extraReqs = nullptr;

MatchParamsBase() {}
MatchParamsBase() = default;
MatchParamsBase(ngen::HW hw, bool systolicAvailable, bool isIntegrated, const GEMMProblem &problem);

protected:
Expand All @@ -61,7 +61,7 @@ struct MatchParamsBase

struct MatchParams : public MatchParamsBase
{
MatchParams() : MatchParamsBase() {}
MatchParams() = default;
MatchParams(ngen::HW hw, bool systolicAvailable, bool isIntegrated, const GEMMProblem &problem)
: MatchParamsBase(hw, systolicAvailable, isIntegrated, problem) {}

Expand Down Expand Up @@ -100,10 +100,8 @@ const kcatalog::Entry *upper_bound(const kcatalog::Catalog &catalog, const kcata

class EntryIterator {
public:
EntryIterator(const kcatalog::Catalog &catalog_, const MatchParams &pattern_): catalog(catalog_), pattern(pattern_) {
begin = lower_bound(catalog_, pattern_.selector);
end = upper_bound(catalog_, pattern_.selector);
current = begin;
EntryIterator(const kcatalog::Catalog &catalog_, const MatchParams &pattern_)
: catalog(catalog_), pattern(pattern_), begin(lower_bound(catalog_, pattern_.selector)), end(upper_bound(catalog_, pattern_.selector)), current(begin) {
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findNextMatch();
}

Expand Down
8 changes: 4 additions & 4 deletions src/gpu/intel/jit/gemm/include/strategy.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2019-2024 Intel Corporation
* Copyright 2019-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -173,7 +173,7 @@ struct CommonStrategy {
EmulationStrategy emulate;
ZPAD(C, 2)

CommonStrategy() {}
CommonStrategy() = default;
CommonStrategy(ngen::HW hw, int stepping = 0);
void preflight(ngen::HW hw, const CommonProblem &problem);
};
Expand Down Expand Up @@ -315,7 +315,7 @@ struct GEMMStrategyPOD : public CommonStrategy {
bool insideSK = false; // Inside a superkernel?
ZPAD(P, 3)

GEMMStrategyPOD() {}
GEMMStrategyPOD() = default;
GEMMStrategyPOD(ngen::HW hw, int stepping = 0) : CommonStrategy(hw, stepping) {}
};

Expand All @@ -325,7 +325,7 @@ struct GEMMStrategy : public GEMMStrategyPOD
{
std::vector<MatrixAddressingStrategy> binary; // Strategies for accessing binary postop data.

GEMMStrategy() {}
GEMMStrategy() = default;
GEMMStrategy(ngen::HW hw, int stepping = 0) : GEMMStrategyPOD(hw, stepping) {}

void preflight(ngen::HW hw, const GEMMProblem &problem);
Expand Down
4 changes: 2 additions & 2 deletions src/gpu/intel/jit/gemm/xe_hp_systolic_gemm.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2019-2024 Intel Corporation
* Copyright 2019-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -175,7 +175,7 @@ struct xe_hp_systolic_gemm_t : public gpu_gemm_t {
public:
xe_hp_systolic_gemm_t(const pd_t *apd) : gpu_gemm_t(apd) {}

virtual status_t execute(const gemm_exec_ctx_t &ctx) const override;
status_t execute(const gemm_exec_ctx_t &ctx) const override;

private:
status_t init_compute(impl::engine_t *engine);
Expand Down
6 changes: 3 additions & 3 deletions src/gpu/intel/jit/gen9_simple_sum.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2019-2024 Intel Corporation
* Copyright 2019-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -63,9 +63,9 @@ struct gen9_simple_sum_t : public gpu_primitive_t {

gen9_simple_sum_t(const pd_t *apd) : gpu_primitive_t(apd) {}

virtual status_t init(impl::engine_t *engine);
status_t init(impl::engine_t *engine) override;

virtual status_t execute(const exec_ctx_t &ctx) const {
status_t execute(const exec_ctx_t &ctx) const override {
status_t status = status::success;
auto &output = CTX_OUT_CLEAN_STORAGE(DNNL_ARG_DST, status);
CHECK(status);
Expand Down
4 changes: 2 additions & 2 deletions src/gpu/intel/jit/ir/blocking.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2023-2024 Intel Corporation
* Copyright 2023-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -50,7 +50,7 @@ class blocking_t {
return loop_.is_empty() && thread_group_.is_empty() && iter_.is_empty();
}
bool is_spatial() const {
for (auto d : {pvars::iw, pvars::ow}) {
for (const auto &d : {pvars::iw, pvars::ow}) {
if (iter_.has(d) && iter_[d] != 1) return true;
}
return false;
Expand Down
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