Fix typo: list -> inst

cms-L1TK · Nov 8, 2023 · e966490 · e966490
1 parent a83ac8b
commit e966490
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/WriteVHDLSyntax.py b/WriteVHDLSyntax.py
@@ -987,7 +987,7 @@ def writeTBMemoryWriteRAMInstance(mtypeB, memDict, proc, bxbitwidth, is_binned):
 
     for memMod in memList:
 
-        mem = memMod.list
+        mem = memMod.inst
 
         string_mem += "    write"+mem+" : entity work.FileWriterFromRAM" + ("Binned\n" if is_binned else "\n")
         string_mem += "    generic map (\n"