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Fix typo in variable name
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Anders Ryd committed Oct 16, 2023
1 parent 68bd9f8 commit a83ac8b
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion WriteVHDLSyntax.py
Original file line number Diff line number Diff line change
Expand Up @@ -892,7 +892,7 @@ def writeFWBlockInstance(topfunc, memDict, memInfoDict, initial_proc, final_proc
string_input += (" "+mem+"_link_empty_neg").ljust(str_len) + "=> "+mem+"_link_empty_neg,\n"
string_input += (" "+mem+"_link_read").ljust(str_len) + "=> "+mem+"_link_read,\n"
else:
string_input += (" "+meme+"_wea").ljust(str_len) + "=> "+memB+"_wea,\n"
string_input += (" "+mem+"_wea").ljust(str_len) + "=> "+mem+"_wea,\n"
string_input += (" "+mem+"_writeaddr").ljust(str_len) + "=> "+mem+"_writeaddr,\n"
string_input += (" "+mem+"_din").ljust(str_len) + "=> "+mem+"_din,\n"
elif memInfo.isFIFO: # Special case FIFO output
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