Feature: Cortex handling unification

src/Makefile

@@ -2,7 +2,7 @@ PROBE_HOST ?= native
 PLATFORM_DIR = platforms/$(PROBE_HOST)
 VPATH += $(PLATFORM_DIR) target
 ENABLE_DEBUG ?= 0
-ENABLE_CORTEXR ?= 0
+ENABLE_CORTEXAR ?= 0
 
 SYS = $(shell $(CC) -dumpmachine)
 
@@ -31,7 +31,6 @@ SRC =              \
 	at32f43x.c     \
 	command.c      \
 	cortex.c       \
-	cortexa.c      \
 	cortexm.c      \
 	crc32.c        \
 	efm32.c        \
@@ -90,9 +89,9 @@ ifeq (,$(filter all_platforms,$(MAKECMDGOALS)))
 include $(PLATFORM_DIR)/Makefile.inc
 endif
 
-ifeq ($(ENABLE_CORTEXR), 1)
-CFLAGS += -DENABLE_CORTEXR
-SRC += cortexr.c
+ifeq ($(ENABLE_CORTEXAR), 1)
+CFLAGS += -DENABLE_CORTEXAR
+SRC += cortexar.c
 endif
 
 ifneq ($(PC_HOSTED),1)

src/platforms/hosted/Makefile.inc

@@ -5,7 +5,7 @@ SYS := $(shell $(CC) -dumpmachine)
 CFLAGS += -DENABLE_DEBUG -DPLATFORM_HAS_DEBUG
 CFLAGS +=-I ./target
 
-ENABLE_CORTEXR := 1
+ENABLE_CORTEXAR := 1
 
 # Clang requires some special handling here: -gnu means MinGW
 # while -msvc means Clang/CL. We don't currently support the latter

src/target/HACKING.md

@@ -30,8 +30,8 @@ In summary, the following applies:
 * JTAG physical reset is referred to by 'nTRST'
 * Software reset as in the case of JTAG-PDI is referred to by 'SRST' if shortened.
 
-The upshot of this is that to inhibit physical reset in the ARM ADIv5/Cortex-M code, set
-`CORTEXM_TOPT_INHIBIT_NRST`, which refers to inhibiting the ADIv5 spec 'SRST'.
+The upshot of this is that to inhibit physical reset in the ARM ADIv5/Cortex code, set
+`CORTEX_TOPT_INHIBIT_NRST`, which refers to inhibiting the ADIv5 spec 'SRST'.
 
 ## Multiple-inclusion guarding
 

src/target/cortex.h

@@ -80,6 +80,8 @@
 #define CORTEXM_GENERAL_REG_COUNT  20U
 #define CORTEXAR_GENERAL_REG_COUNT 17U
 
+#define CORTEX_TOPT_INHIBIT_NRST (1U << 0U)
+
 adiv5_access_port_s *cortex_ap(target_s *target);
 
 #endif /* TARGET_CORTEX_H */