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Fix active design selection behavior for Emit designs #4587
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If the project and design names are not specified, the active project and active design are supposed to be used. However, a new project is always being created when the Emit() object is created.
Thanks for opening a Pull Request. If you want to perform a review write a comment saying: @ansys-reviewer-bot review |
Codecov ReportAll modified and coverable lines are covered by tests ✅
Additional details and impacted files@@ Coverage Diff @@
## main #4587 +/- ##
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+ Coverage 81.52% 81.53% +0.01%
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Files 110 110
Lines 53765 53772 +7
==========================================
+ Hits 43831 43843 +12
+ Misses 9934 9929 -5 |
@myoung301 Thanks for the contribution ! Could you also update the tests such that your modification passes our CI ? |
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LGTM.
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LGTM, thanks for updating the tests
If the project and design names are not specified, the active project and active design are supposed to be used. However, a new project is always being created when the Emit() object is created.