Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[WIP] New $print cell for representing print statements #2459

Closed
wants to merge 8 commits into from

Conversation

whitequark
Copy link
Member

@whitequark whitequark commented Nov 29, 2020

This PR introduces a new cell, $print, which can losslessly represent the behavior of Verilog formatting tasks like $display in always blocks, both clocked and continuous. It adds support for parsing Verilog tasks $display (as well as b, o, h suffix variants) and $write (as well as b, o, h suffix variants) such that they are translated to $print cells, and emitting $print cells as appropriate always blocks containing a $write task.

As a side effect, this PR greatly improves conformance with the Verilog LRM for the $display and $write family tasks used in initial blocks, as well as the $sformatf function. Unfortunately, the latter improvement is likely a breaking change.

Internally, this PR adds an abstract representation of format strings with substitutions that supports RTLIL and Veriog (de)serialization. It specifically does not use Verilog format strings anywhere but on the boundary. This is necessary because IEEE 1800-2017 does not precisely define the semantics of almost every aspect of its formatting facility, and real-world implementations wildly disagree with each other on even the grammar they accept.

The format string representation added by this PR is a new one I designed specifically for this task. It heavily borrows from Python f-strings (in particular, the method of escaping the substitutions is exactly identical) and is designed for simplicity of programmatic use and human readability, in that order.


Remaining work:

  • Add tests (diff against iverilog) for the Fmt::render facility used by Yosys to print messages when it encounters initial $display statements and for $sformatf.
  • Add tests (roundtrip identity check) for the Verilog/RTLIL translation facilities used to support the $print cell.
  • Document the $print cell and its format string mini-language.
  • Implement $print cell handling in CXXRTL.
  • Add back %m support that existed in the old $display implementation (as an alias of %l) but was removed because it is unclear whether this implementation is correct.
  • Add $time and %t support to format strings.

@whitequark whitequark force-pushed the print-cell branch 2 times, most recently from ab953ff to 1f8d444 Compare November 29, 2020 18:45
Useful for error reporting of $display() arguments, etc.
@whitequark whitequark force-pushed the print-cell branch 3 times, most recently from ca36306 to e386e11 Compare December 5, 2020 23:13
@whitequark
Copy link
Member Author

Likely superseded by #3721. (I'll keep this open for now.)

@whitequark
Copy link
Member Author

Obsoleted by #3721.

@whitequark whitequark closed this Aug 11, 2023
@whitequark whitequark deleted the print-cell branch August 11, 2023 17:52
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

1 participant