Add llvm rtti support in AIETargetModel (#1911)

Xilinx · Nov 12, 2024 · 2ca5b22 · 2ca5b22
1 parent 4604956
commit 2ca5b22
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Showing 10 changed files with 247 additions and 27 deletions.
diff --git a/include/aie/Dialect/AIE/IR/AIETargetModel.h b/include/aie/Dialect/AIE/IR/AIETargetModel.h
@@ -53,8 +53,31 @@ using TileID = struct TileID {
 };
 
 class AIETargetModel {
+
+public:
+  enum TargetModelKind {
+    TK_AIE1_VC1902,
+    TK_AIE1_Last,
+    TK_AIE2_VE2302,
+    TK_AIE2_VE2802,
+    TK_AIE2_NPU1,
+    TK_AIE2_NPU1_1Col,
+    TK_AIE2_NPU1_2Col,
+    TK_AIE2_NPU1_3Col,
+    TK_AIE2_NPU1_4Col,
+    TK_AIE2_NPU1_Last,
+    TK_AIE2_NPU2 = TK_AIE2_NPU1_Last,
+    TK_AIE2_NPU2_Last,
+    TK_AIE2_Last = TK_AIE2_NPU2_Last,
+  };
+
+private:
+  const TargetModelKind kind;
+
 public:
-  AIETargetModel() = default;
+  TargetModelKind getKind() const { return kind; }
+
+  AIETargetModel(TargetModelKind k) : kind(k) {}
 
   virtual ~AIETargetModel();
 
@@ -226,7 +249,7 @@ class AIETargetModel {
 
 class AIE1TargetModel : public AIETargetModel {
 public:
-  AIE1TargetModel() = default;
+  AIE1TargetModel(TargetModelKind k) : AIETargetModel(k) {}
 
   bool isCoreTile(int col, int row) const override { return row > 0; }
   bool isMemTile(int col, int row) const override { return false; }
@@ -286,11 +309,16 @@ class AIE1TargetModel : public AIETargetModel {
 
   uint32_t getColumnShift() const override { return 23; }
   uint32_t getRowShift() const override { return 18; }
+
+  static bool classof(const AIETargetModel *model) {
+    return model->getKind() >= TK_AIE1_VC1902 &&
+           model->getKind() < TK_AIE1_Last;
+  }
 };
 
 class AIE2TargetModel : public AIETargetModel {
 public:
-  AIE2TargetModel() = default;
+  AIE2TargetModel(TargetModelKind k) : AIETargetModel(k) {}
 
   AIEArch getTargetArch() const override;
 
@@ -363,14 +391,19 @@ class AIE2TargetModel : public AIETargetModel {
 
   uint32_t getColumnShift() const override { return 25; }
   uint32_t getRowShift() const override { return 20; }
+
+  static bool classof(const AIETargetModel *model) {
+    return model->getKind() >= TK_AIE2_VE2302 &&
+           model->getKind() < TK_AIE2_Last;
+  }
 };
 
 class VC1902TargetModel : public AIE1TargetModel {
   llvm::SmallDenseSet<unsigned, 16> nocColumns = {
       2, 3, 6, 7, 10, 11, 18, 19, 26, 27, 34, 35, 42, 43, 46, 47};
 
 public:
-  VC1902TargetModel() = default;
+  VC1902TargetModel() : AIE1TargetModel(TK_AIE1_VC1902) {}
 
   uint32_t getAddressGenGranularity() const override { return 32; }
 
@@ -389,13 +422,17 @@ class VC1902TargetModel : public AIE1TargetModel {
   bool isShimNOCorPLTile(int col, int row) const override {
     return isShimNOCTile(col, row) || isShimPLTile(col, row);
   }
+
+  static bool classof(const AIETargetModel *model) {
+    return model->getKind() == TK_AIE1_VC1902;
+  }
 };
 
 class VE2302TargetModel : public AIE2TargetModel {
   llvm::SmallDenseSet<unsigned, 8> nocColumns = {2, 3, 6, 7, 10, 11};
 
 public:
-  VE2302TargetModel() = default;
+  VE2302TargetModel() : AIE2TargetModel(TK_AIE2_VE2302) {}
 
   int columns() const override { return 17; }
 
@@ -419,14 +456,18 @@ class VE2302TargetModel : public AIE2TargetModel {
   }
 
   uint32_t getNumMemTileRows() const override { return 1; }
+
+  static bool classof(const AIETargetModel *model) {
+    return model->getKind() == TK_AIE2_VE2302;
+  }
 };
 
 class VE2802TargetModel : public AIE2TargetModel {
   llvm::SmallDenseSet<unsigned, 16> nocColumns = {2,  3,  6,  7,  14, 15,
                                                   22, 23, 30, 31, 34, 35};
 
 public:
-  VE2802TargetModel() = default;
+  VE2802TargetModel() : AIE2TargetModel(TK_AIE2_VE2802) {}
 
   int columns() const override { return 38; }
 
@@ -453,11 +494,15 @@ class VE2802TargetModel : public AIE2TargetModel {
   }
 
   uint32_t getNumMemTileRows() const override { return 2; }
+
+  static bool classof(const AIETargetModel *model) {
+    return model->getKind() == TK_AIE2_VE2802;
+  }
 };
 
 class BaseNPUTargetModel : public AIE2TargetModel {
 public:
-  BaseNPUTargetModel() = default;
+  BaseNPUTargetModel(TargetModelKind k) : AIE2TargetModel(k) {}
 
   int rows() const override {
     return 6; /* 1 Shim row, 1 memtile row, and 4 Core rows. */
@@ -481,12 +526,17 @@ class BaseNPUTargetModel : public AIE2TargetModel {
   virtual bool isVirtualized() const = 0;
 
   virtual bool isNPU() const override { return true; }
+
+  static bool classof(const AIETargetModel *model) {
+    return model->getKind() >= TK_AIE2_NPU1 &&
+           model->getKind() < TK_AIE2_NPU2_Last;
+  }
 };
 
 // The full Phoenix NPU
 class NPUTargetModel : public BaseNPUTargetModel {
 public:
-  NPUTargetModel() = default;
+  NPUTargetModel() : BaseNPUTargetModel(TK_AIE2_NPU1) {}
 
   int columns() const override { return 5; }
 
@@ -500,14 +550,22 @@ class NPUTargetModel : public BaseNPUTargetModel {
   }
 
   bool isVirtualized() const override { return false; }
+
+  static bool classof(const AIETargetModel *model) {
+    return model->getKind() == TK_AIE2_NPU1;
+  }
 };
 
 // A sub-portion of the NPU
 class VirtualizedNPUTargetModel : public BaseNPUTargetModel {
   int cols;
 
 public:
-  VirtualizedNPUTargetModel(int _cols) : cols(_cols) {}
+  VirtualizedNPUTargetModel(int _cols)
+      : BaseNPUTargetModel(static_cast<TargetModelKind>(
+            static_cast<std::underlying_type_t<TargetModelKind>>(TK_AIE2_NPU1) +
+            _cols)),
+        cols(_cols) {}
 
   uint32_t getAddressGenGranularity() const override { return 32; }
 
@@ -516,12 +574,17 @@ class VirtualizedNPUTargetModel : public BaseNPUTargetModel {
   bool isShimNOCTile(int col, int row) const override { return row == 0; }
 
   bool isVirtualized() const override { return true; }
+
+  static bool classof(const AIETargetModel *model) {
+    return model->getKind() >= TK_AIE2_NPU1_1Col &&
+           model->getKind() < TK_AIE2_NPU1_Last;
+  }
 };
 
 // The full Strix. NPU
 class NPU2TargetModel : public BaseNPUTargetModel {
 public:
-  NPU2TargetModel() = default;
+  NPU2TargetModel() : BaseNPUTargetModel(TK_AIE2_NPU2) {}
 
   AIEArch getTargetArch() const override;
 
@@ -532,6 +595,10 @@ class NPU2TargetModel : public BaseNPUTargetModel {
   bool isShimPLTile(int col, int row) const override { return false; }
 
   bool isVirtualized() const override { return false; }
+
+  static bool classof(const AIETargetModel *model) {
+    return model->getKind() == TK_AIE2_NPU2;
+  }
 };
 
 } // namespace xilinx::AIE

diff --git a/lib/Dialect/AIE/IR/AIEDialect.cpp b/lib/Dialect/AIE/IR/AIEDialect.cpp
@@ -1000,8 +1000,7 @@ LogicalResult ConfigureCascadeOp::verify() {
   if (t.isMemTile(tile.colIndex(), tile.rowIndex()))
     return emitOpError("memTile row has no cascade stream interface");
 
-  if ((t.getTargetArch() == AIEArch::AIE2) ||
-      (t.getTargetArch() == AIEArch::AIE2p)) {
+  if (isa<AIE2TargetModel>(t)) {
     if (inputDir == CascadeDir::South || inputDir == CascadeDir::East) {
       return emitOpError("input direction of cascade must be North or West on ")
              << stringifyAIEArch(t.getTargetArch());
@@ -1044,11 +1043,10 @@ LogicalResult GetCascadeOp::verify() {
   Type type = getCascadeValue().getType();
   DataLayout dataLayout = DataLayout::closest(*this);
   auto bits = dataLayout.getTypeSizeInBits(type);
-  if (targetModel.getTargetArch() == AIEArch::AIE1) {
+  if (isa<AIE1TargetModel>(targetModel)) {
     if (bits != 384)
       return emitOpError("must be a 384-bit type");
-  } else if ((targetModel.getTargetArch() == AIEArch::AIE2) ||
-             (targetModel.getTargetArch() == AIEArch::AIE2p)) {
+  } else if (isa<AIE2TargetModel>(targetModel)) {
     if (bits != 512)
       return emitOpError("must be a 512-bit type");
   } else

diff --git a/lib/Dialect/AIE/Transforms/AIECoreToStandard.cpp b/lib/Dialect/AIE/Transforms/AIECoreToStandard.cpp
@@ -283,8 +283,7 @@ struct AIEPutCascadeToStdLowering : OpConversionPattern<PutCascadeOp> {
              << funcName;
     SmallVector<Value, 2> args;
     args.push_back(op.getCascadeValue());
-    if ((targetModel.getTargetArch() == AIEArch::AIE2) ||
-        (targetModel.getTargetArch() == AIEArch::AIE2p))
+    if (isa<AIE2TargetModel>(targetModel))
       args.push_back(rewriter.create<arith::ConstantOp>(
           op.getLoc(), IntegerType::get(rewriter.getContext(), 32),
           rewriter.getI32IntegerAttr(1))); // enable
@@ -318,8 +317,7 @@ struct AIEGetCascadeToStdLowering : OpConversionPattern<GetCascadeOp> {
       return op.emitOpError("Could not find the intrinsic function ")
              << funcName;
     SmallVector<Value, 2> args;
-    if ((targetModel.getTargetArch() == AIEArch::AIE2) ||
-        (targetModel.getTargetArch() == AIEArch::AIE2p))
+    if (isa<AIE2TargetModel>(targetModel))
       args.push_back(rewriter.create<arith::ConstantOp>(
           op.getLoc(), IntegerType::get(rewriter.getContext(), 32),
           rewriter.getI32IntegerAttr(1))); // enable

diff --git a/lib/Dialect/AIE/Transforms/AIEObjectFifoStatefulTransform.cpp b/lib/Dialect/AIE/Transforms/AIEObjectFifoStatefulTransform.cpp
@@ -1134,8 +1134,7 @@ struct AIEObjectFifoStatefulTransformPass
         target = objFifoLinks[*linkOp];
 
     auto dev = op->getParentOfType<DeviceOp>();
-    if (auto &targetArch = dev.getTargetModel();
-        targetArch.getTargetArch() == AIEArch::AIE1) {
+    if (isa<AIE1TargetModel>(dev.getTargetModel())) {
 
       if (locksPerFifo[target].size() == 0) {
         for (int i = 0; i < numLocks; i++) {

diff --git a/lib/Targets/AIERT.cpp b/lib/Targets/AIERT.cpp
@@ -539,8 +539,7 @@ LogicalResult AIERTControl::configureSwitches(DeviceOp &targetOp) {
   }
 
   // Cascade configuration
-  if ((targetModel.getTargetArch() == AIEArch::AIE2) ||
-      (targetModel.getTargetArch() == AIEArch::AIE2p)) {
+  if (isa<AIE2TargetModel>(targetModel)) {
     for (auto configOp : targetOp.getOps<ConfigureCascadeOp>()) {
       TileOp tile = cast<TileOp>(configOp.getTile().getDefiningOp());
       auto tileLoc = XAie_TileLoc(tile.getCol(), tile.getRow());

diff --git a/lib/Targets/AIETargetAirbin.cpp b/lib/Targets/AIETargetAirbin.cpp
@@ -1061,8 +1061,7 @@ static void configureSwitchBoxes(DeviceOp &targetOp) {
 
 static void configureCascade(DeviceOp &targetOp) {
   const auto &target_model = xilinx::AIE::getTargetModel(targetOp);
-  if ((targetModel.getTargetArch() == AIEArch::AIE2) ||
-      (targetModel.getTargetArch() == AIEArch::AIE2p)) {
+  if (isa<AIE2TargetModel>(targetModel)) {
     for (auto configOp : targetOp.getOps<ConfigureCascadeOp>()) {
       TileOp tile = cast<TileOp>(configOp.getTile().getDefiningOp());
       auto inputDir = stringifyCascadeDir(configOp.getInputDir()).upper();

diff --git a/lib/Targets/AIETargetXAIEV2.cpp b/lib/Targets/AIETargetXAIEV2.cpp
@@ -125,8 +125,7 @@ mlir::LogicalResult generateDMAConfig(OpType memOp, raw_ostream &output,
     }
 
     if (0 != ndims)
-      if ((AIEArch::AIE2 != targetModel.getTargetArch()) &&
-          (AIEArch::AIE2p != targetModel.getTargetArch()))
+      if (isa<AIE1TargetModel>(targetModel))
         return memOp.emitOpError("DMA contains at least one multi-dimensional "
                                  "buffer descriptor. This is currently only "
                                  "supported for AIE-ML and later devices.");

diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
@@ -119,3 +119,5 @@ add_lit_testsuite(check-aie "Running the aie regression tests"
   ARGS "-sv --timeout 600"
 )
 set_target_properties(check-aie PROPERTIES FOLDER "Tests")
+
+add_subdirectory(CppTests)
diff --git a/test/CppTests/CMakeLists.txt b/test/CppTests/CMakeLists.txt
@@ -0,0 +1,21 @@
+# Copyright (C) 2023, Xilinx Inc. All rights reserved.
+# Copyright (C) 2023, Advanced Micro Devices, Inc. All rights reserved.
+# SPDX-License-Identifier: MIT
+
+set(CMAKE_CXX_STANDARD 17)
+
+include(CTest)
+
+add_executable(target_model_rtti  target_model_rtti.cpp)
+add_test(NAME TargetModelRtti COMMAND target_model_rtti)
+
+add_custom_target(check-aie-cpp COMMAND ${CMAKE_CTEST_COMMAND} DEPENDS target_model_rtti)
+
+get_property(dialect_libs GLOBAL PROPERTY MLIR_DIALECT_LIBS)
+
+target_link_libraries(target_model_rtti
+                      PUBLIC
+                      AIE
+                      ${dialect_libs})
+
+add_dependencies(check-aie check-aie-cpp)