Skip to content

Commit

Permalink
feat: update project tt_um_8bit_cpu from ramyadhadidi/tt06-8bit-cpu
Browse files Browse the repository at this point in the history 
Commit: 885b5b338e37e554a2cdce4324f3a225b923d3c0
Workflow: https://github.com/ramyadhadidi/tt06-8bit-cpu/actions/runs/8690510085
  • Loading branch information
@TinyTapeoutBot @urish
TinyTapeoutBot authored and urish committed Apr 15, 2024
1 parent 0d5a058 commit 0af2221
Show file tree
Hide file tree
Showing 7 changed files with 43,954 additions and 39,336 deletions.
6 changes: 3 additions & 3 deletions projects/tt_um_8bit_cpu/commit_id.json
View file
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
{
"app": "Tiny Tapeout tt06 d9a6d620",
"app": "Tiny Tapeout tt06 d5153c3f",
"repo": "https://github.com/ramyadhadidi/tt06-8bit-cpu",
"commit": "dc526417334e874cb5e44becba4736d9773f1797",
"workflow_url": "https://github.com/ramyadhadidi/tt06-8bit-cpu/actions/runs/8670663619",
"commit": "885b5b338e37e554a2cdce4324f3a225b923d3c0",
"workflow_url": "https://github.com/ramyadhadidi/tt06-8bit-cpu/actions/runs/8690510085",
"sort_id": 1712978423964,
"openlane_version": "OpenLane eaba5192c45aa333ab45216ce1773d75d539e9b3",
"pdk_version": "open_pdks cd1748bb197f9b7af62a54507de6624e30363943"
Expand Down
2 changes: 1 addition & 1 deletion projects/tt_um_8bit_cpu/stats/metrics.csv
View file
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
/work/src,tt_um_8bit_cpu,wokwi,flow completed,0h2m51s0ms,0h2m21s0ms,88444.70980332748,0.01795472,44222.35490166374,50.99,53.504799999999996,556.66,749,0,0,0,0,0,0,0,0,0,0,-1,-1,27077,6609,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,17554292.0,0.0,54.6,41.28,16.33,4.58,-1,885,1044,33,192,0,0,0,967,30,0,18,33,242,20,4,41,121,105,22,738,225,0,313,794,2070,16493.3184,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,26.520,38.870,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0
/work/src,tt_um_8bit_cpu,wokwi,flow completed,0h3m14s0ms,0h2m41s0ms,98024.36350998511,0.01795472,49012.181754992554,56.74,58.625400000000006,571.56,815,0,0,0,0,0,0,0,0,0,0,-1,-1,30920,7320,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,19039207.0,0.0,59.24,47.88,17.35,9.71,-1,972,1145,35,208,0,0,0,1068,29,0,18,33,286,18,6,45,137,121,21,664,225,0,343,880,2112,16493.3184,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,26.520,38.870,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0
104 changes: 51 additions & 53 deletions projects/tt_um_8bit_cpu/stats/synthesis-stats.txt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,73 +3,71 @@

=== tt_um_8bit_cpu ===

Number of wires: 733
Number of wire bits: 768
Number of public wires: 105
Number of public wire bits: 140
Number of wires: 799
Number of wire bits: 834
Number of public wires: 121
Number of public wire bits: 156
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 749
sky130_fd_sc_hd__a2111o_2 16
Number of cells: 815
sky130_fd_sc_hd__a2111o_2 12
sky130_fd_sc_hd__a2111oi_2 1
sky130_fd_sc_hd__a211o_2 5
sky130_fd_sc_hd__a211oi_2 1
sky130_fd_sc_hd__a211o_2 3
sky130_fd_sc_hd__a211oi_2 2
sky130_fd_sc_hd__a21bo_2 2
sky130_fd_sc_hd__a21boi_2 1
sky130_fd_sc_hd__a21o_2 5
sky130_fd_sc_hd__a21oi_2 9
sky130_fd_sc_hd__a221o_2 39
sky130_fd_sc_hd__a21o_2 12
sky130_fd_sc_hd__a21oi_2 17
sky130_fd_sc_hd__a221o_2 44
sky130_fd_sc_hd__a221oi_2 1
sky130_fd_sc_hd__a22o_2 63
sky130_fd_sc_hd__a2bb2o_2 2
sky130_fd_sc_hd__a22o_2 65
sky130_fd_sc_hd__a22oi_2 1
sky130_fd_sc_hd__a2bb2o_2 1
sky130_fd_sc_hd__a311o_2 1
sky130_fd_sc_hd__a311oi_2 1
sky130_fd_sc_hd__a31o_2 11
sky130_fd_sc_hd__a31oi_2 2
sky130_fd_sc_hd__a32o_2 3
sky130_fd_sc_hd__a41o_2 1
sky130_fd_sc_hd__and2_2 14
sky130_fd_sc_hd__and2b_2 1
sky130_fd_sc_hd__and3_2 18
sky130_fd_sc_hd__a31o_2 1
sky130_fd_sc_hd__a31oi_2 1
sky130_fd_sc_hd__a32o_2 8
sky130_fd_sc_hd__and2_2 15
sky130_fd_sc_hd__and2b_2 5
sky130_fd_sc_hd__and3_2 19
sky130_fd_sc_hd__and3b_2 6
sky130_fd_sc_hd__and4_2 9
sky130_fd_sc_hd__and4b_2 8
sky130_fd_sc_hd__and4bb_2 1
sky130_fd_sc_hd__buf_1 120
sky130_fd_sc_hd__and4_2 4
sky130_fd_sc_hd__and4b_2 7
sky130_fd_sc_hd__and4bb_2 6
sky130_fd_sc_hd__buf_1 137
sky130_fd_sc_hd__conb_1 16
sky130_fd_sc_hd__dfrtp_2 105
sky130_fd_sc_hd__inv_2 15
sky130_fd_sc_hd__mux2_2 98
sky130_fd_sc_hd__nand2_2 39
sky130_fd_sc_hd__dfrtp_2 121
sky130_fd_sc_hd__inv_2 12
sky130_fd_sc_hd__mux2_2 119
sky130_fd_sc_hd__nand2_2 32
sky130_fd_sc_hd__nand2b_2 1
sky130_fd_sc_hd__nand3_2 1
sky130_fd_sc_hd__nand3b_2 2
sky130_fd_sc_hd__nand4b_2 1
sky130_fd_sc_hd__nor2_2 30
sky130_fd_sc_hd__nor2_2 24
sky130_fd_sc_hd__nor2b_2 3
sky130_fd_sc_hd__nor3_2 1
sky130_fd_sc_hd__nor3b_2 3
sky130_fd_sc_hd__nor4_2 4
sky130_fd_sc_hd__o2111a_2 1
sky130_fd_sc_hd__o211a_2 2
sky130_fd_sc_hd__o211ai_2 1
sky130_fd_sc_hd__o21a_2 7
sky130_fd_sc_hd__o21ai_2 6
sky130_fd_sc_hd__o21bai_2 1
sky130_fd_sc_hd__o22a_2 8
sky130_fd_sc_hd__o22ai_2 7
sky130_fd_sc_hd__o2bb2a_2 4
sky130_fd_sc_hd__o311a_2 1
sky130_fd_sc_hd__o31a_2 7
sky130_fd_sc_hd__o32a_2 2
sky130_fd_sc_hd__o32ai_2 1
sky130_fd_sc_hd__or2_2 15
sky130_fd_sc_hd__or2b_2 1
sky130_fd_sc_hd__o211a_2 5
sky130_fd_sc_hd__o211ai_2 3
sky130_fd_sc_hd__o21a_2 8
sky130_fd_sc_hd__o21ai_2 9
sky130_fd_sc_hd__o21ba_2 1
sky130_fd_sc_hd__o21bai_2 2
sky130_fd_sc_hd__o221a_2 4
sky130_fd_sc_hd__o22a_2 11
sky130_fd_sc_hd__o22ai_2 3
sky130_fd_sc_hd__o2bb2a_2 6
sky130_fd_sc_hd__o311a_2 3
sky130_fd_sc_hd__o31a_2 8
sky130_fd_sc_hd__o32a_2 6
sky130_fd_sc_hd__or2_2 11
sky130_fd_sc_hd__or2b_2 4
sky130_fd_sc_hd__or3_2 10
sky130_fd_sc_hd__or3b_2 9
sky130_fd_sc_hd__or4_2 4
sky130_fd_sc_hd__or4b_2 1
sky130_fd_sc_hd__or4bb_2 2
sky130_fd_sc_hd__or3b_2 2
sky130_fd_sc_hd__or4_2 5
sky130_fd_sc_hd__xnor2_2 3
sky130_fd_sc_hd__xor2_2 2
sky130_fd_sc_hd__xor2_2 3

Chip area for module '\tt_um_8bit_cpu': 8116.534400
Chip area for module '\tt_um_8bit_cpu': 9032.412800

Binary file modified projects/tt_um_8bit_cpu/tt_um_8bit_cpu.gds
View file
Binary file not shown.
118 changes: 59 additions & 59 deletions projects/tt_um_8bit_cpu/tt_um_8bit_cpu.lef
View file
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,7 @@ MACRO tt_um_8bit_cpu
PIN rst_n
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.213000 ;
ANTENNAGATEAREA 0.196500 ;
PORT
LAYER met4 ;
RECT 151.190 110.520 151.490 111.520 ;
Expand All @@ -85,7 +85,7 @@ MACRO tt_um_8bit_cpu
PIN ui_in[1]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.213000 ;
ANTENNAGATEAREA 0.196500 ;
PORT
LAYER met4 ;
RECT 143.830 110.520 144.130 111.520 ;
Expand All @@ -112,7 +112,7 @@ MACRO tt_um_8bit_cpu
PIN ui_in[4]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.159000 ;
ANTENNAGATEAREA 0.213000 ;
PORT
LAYER met4 ;
RECT 132.790 110.520 133.090 111.520 ;
Expand All @@ -130,7 +130,7 @@ MACRO tt_um_8bit_cpu
PIN ui_in[6]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.213000 ;
ANTENNAGATEAREA 0.159000 ;
PORT
LAYER met4 ;
RECT 125.430 110.520 125.730 111.520 ;
Expand Down Expand Up @@ -184,7 +184,7 @@ MACRO tt_um_8bit_cpu
PIN uio_in[4]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.126000 ;
ANTENNAGATEAREA 0.213000 ;
PORT
LAYER met4 ;
RECT 103.350 110.520 103.650 111.520 ;
Expand All @@ -193,7 +193,7 @@ MACRO tt_um_8bit_cpu
PIN uio_in[5]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.213000 ;
ANTENNAGATEAREA 0.159000 ;
PORT
LAYER met4 ;
RECT 99.670 110.520 99.970 111.520 ;
Expand All @@ -202,7 +202,7 @@ MACRO tt_um_8bit_cpu
PIN uio_in[6]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.126000 ;
ANTENNAGATEAREA 0.213000 ;
PORT
LAYER met4 ;
RECT 95.990 110.520 96.290 111.520 ;
Expand Down Expand Up @@ -348,7 +348,7 @@ MACRO tt_um_8bit_cpu
PIN uo_out[0]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
ANTENNAGATEAREA 0.247500 ;
ANTENNAGATEAREA 0.126000 ;
ANTENNADIFFAREA 0.891000 ;
PORT
LAYER met4 ;
Expand Down Expand Up @@ -450,62 +450,62 @@ MACRO tt_um_8bit_cpu
LAYER li1 ;
RECT 2.760 2.635 158.240 108.885 ;
LAYER met1 ;
RECT 2.760 2.480 159.040 111.140 ;
RECT 2.760 2.480 159.040 110.460 ;
LAYER met2 ;
RECT 4.230 2.535 159.010 111.170 ;
RECT 4.230 2.535 159.010 110.685 ;
LAYER met3 ;
RECT 3.950 2.555 159.030 110.665 ;
LAYER met4 ;
RECT 4.690 110.120 7.270 111.170 ;
RECT 8.370 110.120 10.950 111.170 ;
RECT 12.050 110.120 14.630 111.170 ;
RECT 15.730 110.120 18.310 111.170 ;
RECT 19.410 110.120 21.990 111.170 ;
RECT 23.090 110.120 25.670 111.170 ;
RECT 26.770 110.120 29.350 111.170 ;
RECT 30.450 110.120 33.030 111.170 ;
RECT 34.130 110.120 36.710 111.170 ;
RECT 37.810 110.120 40.390 111.170 ;
RECT 41.490 110.120 44.070 111.170 ;
RECT 45.170 110.120 47.750 111.170 ;
RECT 48.850 110.120 51.430 111.170 ;
RECT 52.530 110.120 55.110 111.170 ;
RECT 56.210 110.120 58.790 111.170 ;
RECT 59.890 110.120 62.470 111.170 ;
RECT 63.570 110.120 66.150 111.170 ;
RECT 67.250 110.120 69.830 111.170 ;
RECT 70.930 110.120 73.510 111.170 ;
RECT 74.610 110.120 77.190 111.170 ;
RECT 78.290 110.120 80.870 111.170 ;
RECT 81.970 110.120 84.550 111.170 ;
RECT 85.650 110.120 88.230 111.170 ;
RECT 89.330 110.120 91.910 111.170 ;
RECT 93.010 110.120 95.590 111.170 ;
RECT 96.690 110.120 99.270 111.170 ;
RECT 100.370 110.120 102.950 111.170 ;
RECT 104.050 110.120 106.630 111.170 ;
RECT 107.730 110.120 110.310 111.170 ;
RECT 111.410 110.120 113.990 111.170 ;
RECT 115.090 110.120 117.670 111.170 ;
RECT 118.770 110.120 121.350 111.170 ;
RECT 122.450 110.120 125.030 111.170 ;
RECT 126.130 110.120 128.710 111.170 ;
RECT 129.810 110.120 132.390 111.170 ;
RECT 133.490 110.120 136.070 111.170 ;
RECT 137.170 110.120 139.750 111.170 ;
RECT 140.850 110.120 143.430 111.170 ;
RECT 144.530 110.120 147.110 111.170 ;
RECT 148.210 110.120 150.790 111.170 ;
RECT 151.890 110.120 154.470 111.170 ;
RECT 4.690 110.120 7.270 110.665 ;
RECT 8.370 110.120 10.950 110.665 ;
RECT 12.050 110.120 14.630 110.665 ;
RECT 15.730 110.120 18.310 110.665 ;
RECT 19.410 110.120 21.990 110.665 ;
RECT 23.090 110.120 25.670 110.665 ;
RECT 26.770 110.120 29.350 110.665 ;
RECT 30.450 110.120 33.030 110.665 ;
RECT 34.130 110.120 36.710 110.665 ;
RECT 37.810 110.120 40.390 110.665 ;
RECT 41.490 110.120 44.070 110.665 ;
RECT 45.170 110.120 47.750 110.665 ;
RECT 48.850 110.120 51.430 110.665 ;
RECT 52.530 110.120 55.110 110.665 ;
RECT 56.210 110.120 58.790 110.665 ;
RECT 59.890 110.120 62.470 110.665 ;
RECT 63.570 110.120 66.150 110.665 ;
RECT 67.250 110.120 69.830 110.665 ;
RECT 70.930 110.120 73.510 110.665 ;
RECT 74.610 110.120 77.190 110.665 ;
RECT 78.290 110.120 80.870 110.665 ;
RECT 81.970 110.120 84.550 110.665 ;
RECT 85.650 110.120 88.230 110.665 ;
RECT 89.330 110.120 91.910 110.665 ;
RECT 93.010 110.120 95.590 110.665 ;
RECT 96.690 110.120 99.270 110.665 ;
RECT 100.370 110.120 102.950 110.665 ;
RECT 104.050 110.120 106.630 110.665 ;
RECT 107.730 110.120 110.310 110.665 ;
RECT 111.410 110.120 113.990 110.665 ;
RECT 115.090 110.120 117.670 110.665 ;
RECT 118.770 110.120 121.350 110.665 ;
RECT 122.450 110.120 125.030 110.665 ;
RECT 126.130 110.120 128.710 110.665 ;
RECT 129.810 110.120 132.390 110.665 ;
RECT 133.490 110.120 136.070 110.665 ;
RECT 137.170 110.120 139.750 110.665 ;
RECT 140.850 110.120 143.430 110.665 ;
RECT 144.530 110.120 147.110 110.665 ;
RECT 148.210 110.120 150.790 110.665 ;
RECT 151.890 110.120 154.470 110.665 ;
RECT 3.975 109.440 155.185 110.120 ;
RECT 3.975 27.375 20.995 109.440 ;
RECT 23.395 27.375 40.430 109.440 ;
RECT 42.830 27.375 59.865 109.440 ;
RECT 62.265 27.375 79.300 109.440 ;
RECT 81.700 27.375 98.735 109.440 ;
RECT 101.135 27.375 118.170 109.440 ;
RECT 120.570 27.375 137.605 109.440 ;
RECT 140.005 27.375 155.185 109.440 ;
RECT 3.975 12.415 20.995 109.440 ;
RECT 23.395 12.415 40.430 109.440 ;
RECT 42.830 12.415 59.865 109.440 ;
RECT 62.265 12.415 79.300 109.440 ;
RECT 81.700 12.415 98.735 109.440 ;
RECT 101.135 12.415 118.170 109.440 ;
RECT 120.570 12.415 137.605 109.440 ;
RECT 140.005 12.415 155.185 109.440 ;
END
END tt_um_8bit_cpu
END LIBRARY
Expand Down
Loading

0 comments on commit 0af2221

Please sign in to comment.