Refactor deltadebug #5223

habibayassin · 2024-06-10T22:48:22Z

#5117

Signed-off-by: habibayassin <[email protected]>

github-actions · 2024-06-10T22:51:28Z

clang-tidy review says "All clean, LGTM! 👍"

habibayassin · 2024-06-10T22:51:44Z

final def output before:

VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN uart ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 17000 17000 ) ;
ROW ROW_0 asap7sc7p5t 1080 1080 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_1 asap7sc7p5t 1080 1350 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_2 asap7sc7p5t 1080 1620 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_3 asap7sc7p5t 1080 1890 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_4 asap7sc7p5t 1080 2160 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_5 asap7sc7p5t 1080 2430 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_6 asap7sc7p5t 1080 2700 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_7 asap7sc7p5t 1080 2970 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_8 asap7sc7p5t 1080 3240 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_9 asap7sc7p5t 1080 3510 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_10 asap7sc7p5t 1080 3780 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_11 asap7sc7p5t 1080 4050 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_12 asap7sc7p5t 1080 4320 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_13 asap7sc7p5t 1080 4590 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_14 asap7sc7p5t 1080 4860 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_15 asap7sc7p5t 1080 5130 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_16 asap7sc7p5t 1080 5400 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_17 asap7sc7p5t 1080 5670 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_18 asap7sc7p5t 1080 5940 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_19 asap7sc7p5t 1080 6210 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_20 asap7sc7p5t 1080 6480 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_21 asap7sc7p5t 1080 6750 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_22 asap7sc7p5t 1080 7020 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_23 asap7sc7p5t 1080 7290 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_24 asap7sc7p5t 1080 7560 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_25 asap7sc7p5t 1080 7830 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_26 asap7sc7p5t 1080 8100 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_27 asap7sc7p5t 1080 8370 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_28 asap7sc7p5t 1080 8640 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_29 asap7sc7p5t 1080 8910 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_30 asap7sc7p5t 1080 9180 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_31 asap7sc7p5t 1080 9450 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_32 asap7sc7p5t 1080 9720 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_33 asap7sc7p5t 1080 9990 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_34 asap7sc7p5t 1080 10260 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_35 asap7sc7p5t 1080 10530 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_36 asap7sc7p5t 1080 10800 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_37 asap7sc7p5t 1080 11070 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_38 asap7sc7p5t 1080 11340 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_39 asap7sc7p5t 1080 11610 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_40 asap7sc7p5t 1080 11880 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_41 asap7sc7p5t 1080 12150 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_42 asap7sc7p5t 1080 12420 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_43 asap7sc7p5t 1080 12690 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_44 asap7sc7p5t 1080 12960 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_45 asap7sc7p5t 1080 13230 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_46 asap7sc7p5t 1080 13500 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_47 asap7sc7p5t 1080 13770 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_48 asap7sc7p5t 1080 14040 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_49 asap7sc7p5t 1080 14310 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_50 asap7sc7p5t 1080 14580 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_51 asap7sc7p5t 1080 14850 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_52 asap7sc7p5t 1080 15120 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_53 asap7sc7p5t 1080 15390 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_54 asap7sc7p5t 1080 15660 N DO 276 BY 1 STEP 54 0 ;
TRACKS X 116 DO 211 STEP 80 LAYER Pad ;
TRACKS Y 116 DO 211 STEP 80 LAYER Pad ;
TRACKS X 116 DO 211 STEP 80 LAYER M9 ;
TRACKS Y 116 DO 211 STEP 80 LAYER M9 ;
TRACKS X 116 DO 211 STEP 80 LAYER M8 ;
TRACKS Y 116 DO 211 STEP 80 LAYER M8 ;
TRACKS X 16 DO 266 STEP 64 LAYER M7 ;
TRACKS Y 16 DO 266 STEP 64 LAYER M7 ;
TRACKS X 60 DO 353 STEP 48 LAYER M6 ;
TRACKS Y 16 DO 266 STEP 64 LAYER M6 ;
TRACKS X 12 DO 354 STEP 48 LAYER M5 ;
TRACKS Y 12 DO 354 STEP 48 LAYER M5 ;
TRACKS X 45 DO 471 STEP 36 LAYER M4 ;
TRACKS Y 12 DO 354 STEP 48 LAYER M4 ;
TRACKS X 9 DO 472 STEP 36 LAYER M3 ;
TRACKS Y 9 DO 472 STEP 36 LAYER M3 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS Y 45 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 81 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 117 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 153 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 189 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 225 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 270 DO 62 STEP 270 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M1 ;
TRACKS Y 9 DO 472 STEP 36 LAYER M1 ;
VIAS 2 ;
- via1_2_14904_18_1_414_36_36 + VIARULE M2_M1 + CUTSIZE 18 18 + LAYERS M1 V1 M2 + CUTSPACING 18 18 + ENCLOSURE 0 0 2 0 + ROWCOL 1 414 ;
- via5_6_120_288_1_2_58_322 + VIARULE M6_M5widePWR1p152 + CUTSIZE 24 288 + LAYERS M5 V5 M6 + CUTSPACING 34 34 + ENCLOSURE 19 0 0 0 + ROWCOL 1 2 ;
END VIAS
COMPONENTS 5 ;
- 0859 AND3x1_ASAP7_75t_R + PLACED ( 6150 11576 ) N ;
- 0860 AND3x1_ASAP7_75t_R + PLACED ( 5199 12119 ) N ;
- 0861 XNOR2x2_ASAP7_75t_R + PLACED ( 5005 12179 ) N ;
- 0867 AO221x1_ASAP7_75t_R + PLACED ( 6689 10316 ) N ;
- 0868 AND3x1_ASAP7_75t_R + PLACED ( 5518 12147 ) N ;
END COMPONENTS
NETS 5 ;
- 0268 ( 0868 A ) ( 0859 A ) + USE SIGNAL ;
- 0362 ( 0861 B ) ( 0860 Y ) + USE SIGNAL ;
- 0363 ( 0868 B ) ( 0861 Y ) + USE SIGNAL ;
- 0368 ( 0867 B1 ) + USE SIGNAL ;
- 0369 ( 0868 C ) ( 0867 Y ) + USE SIGNAL ;
END NETS
END DESIGN

habibayassin · 2024-06-10T22:53:26Z

final def after mangling:

VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN uart ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 17000 17000 ) ;
ROW ROW_0 asap7sc7p5t 1080 1080 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_1 asap7sc7p5t 1080 1350 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_2 asap7sc7p5t 1080 1620 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_3 asap7sc7p5t 1080 1890 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_4 asap7sc7p5t 1080 2160 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_5 asap7sc7p5t 1080 2430 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_6 asap7sc7p5t 1080 2700 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_7 asap7sc7p5t 1080 2970 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_8 asap7sc7p5t 1080 3240 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_9 asap7sc7p5t 1080 3510 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_10 asap7sc7p5t 1080 3780 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_11 asap7sc7p5t 1080 4050 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_12 asap7sc7p5t 1080 4320 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_13 asap7sc7p5t 1080 4590 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_14 asap7sc7p5t 1080 4860 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_15 asap7sc7p5t 1080 5130 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_16 asap7sc7p5t 1080 5400 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_17 asap7sc7p5t 1080 5670 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_18 asap7sc7p5t 1080 5940 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_19 asap7sc7p5t 1080 6210 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_20 asap7sc7p5t 1080 6480 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_21 asap7sc7p5t 1080 6750 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_22 asap7sc7p5t 1080 7020 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_23 asap7sc7p5t 1080 7290 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_24 asap7sc7p5t 1080 7560 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_25 asap7sc7p5t 1080 7830 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_26 asap7sc7p5t 1080 8100 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_27 asap7sc7p5t 1080 8370 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_28 asap7sc7p5t 1080 8640 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_29 asap7sc7p5t 1080 8910 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_30 asap7sc7p5t 1080 9180 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_31 asap7sc7p5t 1080 9450 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_32 asap7sc7p5t 1080 9720 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_33 asap7sc7p5t 1080 9990 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_34 asap7sc7p5t 1080 10260 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_35 asap7sc7p5t 1080 10530 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_36 asap7sc7p5t 1080 10800 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_37 asap7sc7p5t 1080 11070 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_38 asap7sc7p5t 1080 11340 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_39 asap7sc7p5t 1080 11610 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_40 asap7sc7p5t 1080 11880 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_41 asap7sc7p5t 1080 12150 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_42 asap7sc7p5t 1080 12420 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_43 asap7sc7p5t 1080 12690 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_44 asap7sc7p5t 1080 12960 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_45 asap7sc7p5t 1080 13230 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_46 asap7sc7p5t 1080 13500 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_47 asap7sc7p5t 1080 13770 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_48 asap7sc7p5t 1080 14040 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_49 asap7sc7p5t 1080 14310 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_50 asap7sc7p5t 1080 14580 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_51 asap7sc7p5t 1080 14850 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_52 asap7sc7p5t 1080 15120 N DO 276 BY 1 STEP 54 0 ;
ROW ROW_53 asap7sc7p5t 1080 15390 FS DO 276 BY 1 STEP 54 0 ;
ROW ROW_54 asap7sc7p5t 1080 15660 N DO 276 BY 1 STEP 54 0 ;
TRACKS X 116 DO 211 STEP 80 LAYER Pad ;
TRACKS Y 116 DO 211 STEP 80 LAYER Pad ;
TRACKS X 116 DO 211 STEP 80 LAYER M9 ;
TRACKS Y 116 DO 211 STEP 80 LAYER M9 ;
TRACKS X 116 DO 211 STEP 80 LAYER M8 ;
TRACKS Y 116 DO 211 STEP 80 LAYER M8 ;
TRACKS X 16 DO 266 STEP 64 LAYER M7 ;
TRACKS Y 16 DO 266 STEP 64 LAYER M7 ;
TRACKS X 60 DO 353 STEP 48 LAYER M6 ;
TRACKS Y 16 DO 266 STEP 64 LAYER M6 ;
TRACKS X 12 DO 354 STEP 48 LAYER M5 ;
TRACKS Y 12 DO 354 STEP 48 LAYER M5 ;
TRACKS X 45 DO 471 STEP 36 LAYER M4 ;
TRACKS Y 12 DO 354 STEP 48 LAYER M4 ;
TRACKS X 9 DO 472 STEP 36 LAYER M3 ;
TRACKS Y 9 DO 472 STEP 36 LAYER M3 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M2 ;
TRACKS Y 45 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 81 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 117 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 153 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 189 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 225 DO 63 STEP 270 LAYER M2 ;
TRACKS Y 270 DO 62 STEP 270 LAYER M2 ;
TRACKS X 9 DO 472 STEP 36 LAYER M1 ;
TRACKS Y 9 DO 472 STEP 36 LAYER M1 ;
VIAS 2 ;
- via1_2_14904_18_1_414_36_36 + VIARULE M2_M1 + CUTSIZE 18 18 + LAYERS M1 V1 M2 + CUTSPACING 18 18 + ENCLOSURE 0 0 2 0 + ROWCOL 1 414 ;
- via5_6_120_288_1_2_58_322 + VIARULE M6_M5widePWR1p152 + CUTSIZE 24 288 + LAYERS M5 V5 M6 + CUTSPACING 34 34 + ENCLOSURE 19 0 0 0 + ROWCOL 1 2 ;
END VIAS
COMPONENTS 5 ;
- element1 AND3x1_ASAP7_75t_R + PLACED ( 6150 11576 ) N ;
- element2 AND3x1_ASAP7_75t_R + PLACED ( 5199 12119 ) N ;
- element3 XNOR2x2_ASAP7_75t_R + PLACED ( 5005 12179 ) N ;
- element4 AO221x1_ASAP7_75t_R + PLACED ( 6689 10316 ) N ;
- element5 AND3x1_ASAP7_75t_R + PLACED ( 5518 12147 ) N ;
END COMPONENTS
NETS 5 ;
- net1 ( element5 A ) ( element1 A ) + USE SIGNAL ;
- net2 ( element3 B ) ( element2 Y ) + USE SIGNAL ;
- net3 ( element5 B ) ( element3 Y ) + USE SIGNAL ;
- net4 ( element4 B1 ) + USE SIGNAL ;
- net5 ( element5 C ) ( element4 Y ) + USE SIGNAL ;
END NETS
END DESIGN

habibayassin · 2024-06-10T22:58:14Z

reduced_asap7_lib_and_lef.zip

oharboe

Nits + add some automated regression testing.

Also, update documentation with what to input and what to expect and an example, probably based on automated regression test in CI?

oharboe · 2024-06-11T06:54:48Z

etc/deltaDebug.py

+        self.deltaDebug_result_def_file = os.path.join(
+            base_db_directory, f"deltaDebug_base_result_def.def")
+
+        # # The name of the result file after running deltaDebug


nit: Extranous # #

oharboe · 2024-06-11T06:56:30Z

etc/deltaDebug.py

+        print("Attempt to reduce lib files in", self.lib_directory)
+        if not os.path.exists(self.lib_directory):
+            return
+        for lib_file in glob.glob(os.path.join( self.lib_directory, "*.lib")):


run through a python formatter

oharboe · 2024-06-11T14:38:21Z

Also make sure the unittest w mocking is hooked up to CI and still works

habibayassin · 2024-06-22T19:32:19Z

@oharboe do you think we need to mangle the name of the PDK from the final def file?

oharboe · 2024-06-22T21:10:02Z

If the PDK is under NDA, then renaming it is not going to do anything...

@maliberty ?

maliberty · 2024-06-23T00:14:43Z

My impression is that the goal here is more to limit how much data is handed off between orgs, even under NDA. I don't expect we will be able to fully automate a process to reduce a test case to a publicly releasable form from a private PDK. If so, renaming the PDK is not important.

habibayassin · 2024-07-01T19:38:35Z

Also make sure the unittest w mocking is hooked up to CI and still works

@oharboe are you referring to the one in ORFS?
currently, the test in the ci is failing here because OpenROAD needed to be updated

Signed-off-by: habibayassin <[email protected]>

github-actions · 2024-07-01T19:49:15Z

clang-tidy review says "All clean, LGTM! 👍"

oharboe · 2024-07-02T06:55:02Z

@habibayassin @maliberty Make sure this test is hooked up to CI https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/etc/test_deltaDebug.py

Signed-off-by: habibayassin <[email protected]>

habibayassin · 2024-07-28T23:48:29Z

@habibayassin @maliberty Make sure this test is hooked up to CI https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/etc/test_deltaDebug.py

@vvbandeira

github-actions · 2024-07-28T23:51:24Z

clang-tidy review says "All clean, LGTM! 👍"

oharboe

This PR has lots of "driveby changes", small fixes that have nothing to do with the major theme/feature of this PR, to introduce the the new lib/lef bisection feature. I suggest to separate out a PR to fix all those non-feature changes. This will make it easier to see what actually changed.
I don't see that the regression tests are hooked up to CI

oharboe · 2024-07-29T04:59:12Z

etc/deltaDebug.py

+        platform = match.group(2)
+
+        if design is None or platform is None:
+            print("Invalid step argument format. Expected format: run-me-<design>-<platform>-base.sh")


this is going to break when the step does not include a "run-me-*.sh" file.

add non "run-me-*.sh" --step test to CI

can you clarify more on this?

I will make more automated tests to cover more use-cases once I'm sure CI is hooked up.

CI isn't hooked up correctly, but @vvbandeira and @maliberty know.

I added a use-case which doesn't use "make issue" to the integraiton tests The-OpenROAD-Project/OpenROAD-flow-scripts#2209

oharboe · 2024-07-29T05:02:20Z

etc/deltaDebug.py


        base_db_directory = os.path.dirname(opt.base_db_path)
        base_db_name = os.path.basename(opt.base_db_path)
        self.base_db_file = opt.base_db_path

+        self.lib_directory , self.lef_directory = parse_vars_file(parse_vars_file_name(opt.step))


the name is confusing here. Is it self.lib/lef_directory? If so, how is this going to work when .lib files are spread across multiple directories? What about technology files from the PDK?

oharboe · 2024-07-30T18:00:01Z

@maliberty @vvbandeira FYI Checking if CI tests are running on delta debug.

These should both fail, or CI is not hooked up.

The-OpenROAD-Project/OpenROAD-flow-scripts#2207
#5483

oharboe · 2024-07-31T06:49:36Z

@vvbandeira @maliberty Also waiting to see if CI catches this error #5485

habibayassin added 3 commits June 8, 2024 23:33

refactor deltadebug

5c81c2f

Signed-off-by: habibayassin <[email protected]>

fix def file path

e729cca

Signed-off-by: habibayassin <[email protected]>

replace all instances

b5a57cb

Signed-off-by: habibayassin <[email protected]>

habibayassin mentioned this pull request Jun 10, 2024

refactor deltadebug The-OpenROAD-Project/OpenROAD-flow-scripts#2057

Closed

habibayassin requested review from oharboe, vvbandeira and maliberty June 10, 2024 22:49

oharboe suggested changes Jun 11, 2024

View reviewed changes

format and cleanup

77a9e90

Signed-off-by: habibayassin <[email protected]>

habibayassin added 3 commits July 28, 2024 23:10

prev refactor

a9ccf96

Signed-off-by: habibayassin <[email protected]>

take args dynamically

7cb43a7

Signed-off-by: habibayassin <[email protected]>

parse vars

2a8b7cf

Signed-off-by: habibayassin <[email protected]>

oharboe suggested changes Jul 29, 2024

View reviewed changes

oharboe mentioned this pull request Jul 29, 2024

delta_debug: reduce review noise by getting some simple formatting changes in #5467

Closed

vvbandeira marked this pull request as draft October 7, 2024 20:05

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Refactor deltadebug #5223

Refactor deltadebug #5223

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oharboe commented Jul 31, 2024

Refactor deltadebug #5223

Are you sure you want to change the base?

Refactor deltadebug #5223

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