Merge pull request #85 from xmos/release/v6.1.1

Release 6.1.1

CHANGELOG.rst

@@ -1,6 +1,11 @@
 I2C library change log
 ======================
 
+6.1.1
+-----
+
+  * RESOLVED: Fixed timing for repeated START condition
+
 6.1.0
 -----
 

lib_i2c/module_build_info

@@ -1,4 +1,4 @@
-VERSION = 6.1.0
+VERSION = 6.1.1
 
 DEPENDENT_MODULES = lib_xassert(>=4.0.0) \
                     lib_logging(>=3.0.0)

lib_i2c/src/i2c_master.xc

@@ -132,7 +132,8 @@ static void start_bit(
   timer tmr;
 
   if (!stopped) {
-    tmr when timerafter(fall_time + compute_low_period_ticks(kbits_per_second)) :> void;
+    fall_time += compute_low_period_ticks(kbits_per_second);
+    tmr when timerafter(fall_time) :> fall_time;
     release_clock_and_wait(p_scl, fall_time, compute_bus_off_ticks(kbits_per_second));
   }
 

lib_i2c/src/i2c_master_single_port.xc

@@ -157,7 +157,8 @@ static void start_bit(
   timer tmr;
 
   if (!stopped) {
-    tmr when timerafter(fall_time + compute_low_period_ticks(kbits_per_second)) :> void;
+    fall_time += compute_low_period_ticks(kbits_per_second);
+    tmr when timerafter(fall_time) :> fall_time;
     p_i2c <: SCL_HIGH | SDA_HIGH | other_bits_mask;
     wait_for_clock_high(p_i2c, scl_bit_position, fall_time, compute_bus_off_ticks(kbits_per_second));
   }

tests/ack_test_no_stop.expect

@@ -9,7 +9,7 @@ Sending ack
 Byte received: 0xfe
 Speed = \d+ Kbps
 Sending ack
-Start bit received
+Repeated start bit received
 Byte received: 0xf6
 Speed = \d+ Kbps
 Master write transaction started, device address=0x7b

tests/i2c_master_checker.py

@@ -90,6 +90,16 @@ def check_data_valid_time(self, time):
            (self._expected_speed == 400 and time >  900):
             self.error("Data valid time not respected: %gns" % time)
 
+    def check_hold_start_time(self, time):
+        if (self._expected_speed == 100 and time < 4000) or\
+           (self._expected_speed == 400 and time < 600):
+            self.error("Start hold time less than minimum in spec: %gns" % time)
+
+    def check_setup_start_time(self, time):
+        if (self._expected_speed == 100 and time < 4700) or\
+           (self._expected_speed == 400 and time < 600):
+            self.error("Start bit setup time less than minimum in spec: %gns" % time)
+
     def check_data_setup_time(self, time):
         if (self._expected_speed == 100 and time < 250) or\
            (self._expected_speed == 400 and time < 100):
@@ -146,7 +156,7 @@ def get_next_data_item(self):
       "NACKED_SELECT"    : ( 0,    1,     "STOPPED",          "STOPPING_0" ),
       "STOPPING_0"       : ( 0,    0,     "STOPPING_1",       "ILLEGAL" ),
       "STOPPING_1"       : ( 1,    0,     "ILLEGAL",          "STOPPED" ),
-      "REPEAT_START"     : ( 0,    1,     "ILLEGAL",          "STARTING" ),
+      "REPEAT_START"     : ( 1,    0,     "DRIVE_BIT",        "ILLEGAL" ),
       "ILLEGAL"          : ( None, None,  "ILLEGAL",          "ILLEGAL" ),
     }
 
@@ -342,21 +352,29 @@ def byte_done(self):
     def handle_stopped(self):
       pass
 
-    def handle_starting(self):
-      print("Start bit received")
+    def starting_sequence(self):
       self._byte_num = 0
       self.start_read()
       if self._last_sda_change_time is not None:
         self.check_bus_free_time(self.xsi.get_time() - self._last_sda_change_time)
 
     def handle_drive_bit(self):
+      if self._sda_change_time is not None and \
+        (self._prev_state == "STARTING" or self._prev_state == "REPEAT_START") :
+        # Need to check that the start hold time has been respected
+        self.check_hold_start_time(self.xsi.get_time() - self._sda_change_time)
+
       if self._write_data is not None:
         # Drive data being read by master
         self.drive_sda((self._write_data & 0x80) >> 7)
       else:
         # Simulate external pullup
         self.drive_sda(1)
 
+    def handle_starting(self):
+      print("Start bit received")
+      self.starting_sequence()
+
     def handle_sample_bit(self):
       if self._read_data is not None:
         # Ensure that the data setup time has been respected
@@ -380,7 +398,9 @@ def handle_check_start_stop(self):
       else:
         if self._bit_num != 1:
           self.error("Start bit detected mid-byte")
-        self.set_state("STARTING")
+          self.set_state("STARTING")
+        else:
+          self.set_state("REPEAT_START")
 
     def handle_byte_done(self):
       pass
@@ -414,7 +434,7 @@ def handle_sample_ack(self):
 
       else:
         nack = self.read_sda_value()
-        print("Master sends %s." % ("NACK" if nack else "ACK"));
+        print("Master sends %s." % ("NACK" if nack else "ACK"))
         if nack:
           self.set_state("NACKED")
           print("Waiting for stop/start bit")
@@ -440,10 +460,13 @@ def handle_stopping_0(self):
       pass
 
     def handle_stopping_1(self):
-      print("Stop bit received");
+      print("Stop bit received")
 
     def handle_repeat_start(self):
       print("Repeated start bit received")
+      # Need to check setup time for repeated start has been respected
+      self.check_setup_start_time(self._sda_change_time - self._scl_change_time)
+      self.starting_sequence()
 
     def handle_illegal(self):
       self.error("Illegal state arrived at from {}".format(self._prev_state))

tests/lock_test.expect

@@ -6,7 +6,7 @@ Sending ack
 Byte received: 0x99
 Speed = \d+ Kbps
 Sending ack
-Start bit received
+Repeated start bit received
 Byte received: 0x66
 Speed = \d+ Kbps
 Master write transaction started, device address=0x33

tests/reg_ops_nack.expect

@@ -66,7 +66,7 @@ Sending ack
 Byte received: 0x22
 Speed = \d+ Kbps
 Sending ack
-Start bit received
+Repeated start bit received
 Byte received: 0x8f
 Speed = \d+ Kbps
 Master read transaction started, device address=0x47

tests/reg_test.expect

@@ -66,7 +66,7 @@ Sending ack
 Byte received: 0x33
 Speed = \d+ Kbps
 Sending ack
-Start bit received
+Repeated start bit received
 Byte received: 0x89
 Speed = \d+ Kbps
 Master read transaction started, device address=0x44
@@ -87,7 +87,7 @@ Sending ack
 Byte received: 0x21
 Speed = \d+ Kbps
 Sending ack
-Start bit received
+Repeated start bit received
 Byte received: 0x8b
 Speed = \d+ Kbps
 Master read transaction started, device address=0x45
@@ -108,7 +108,7 @@ Sending ack
 Byte received: 0x99
 Speed = \d+ Kbps
 Sending ack
-Start bit received
+Repeated start bit received
 Byte received: 0x8d
 Speed = \d+ Kbps
 Master read transaction started, device address=0x46
@@ -129,7 +129,7 @@ Sending ack
 Byte received: 0x22
 Speed = \d+ Kbps
 Sending ack
-Start bit received
+Repeated start bit received
 Byte received: 0x8f
 Speed = \d+ Kbps
 Master read transaction started, device address=0x47

tests/repeated_start.expect

@@ -6,7 +6,7 @@ Sending ack
 Byte received: 0x99
 Speed = \d+ Kbps
 Sending ack
-Start bit received
+Repeated start bit received
 Byte received: 0x66
 Speed = \d+ Kbps
 Master write transaction started, device address=0x33