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backend: (riscv) add 1d, 3d, and 4d snitch stream lowerings #1781
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%0 = "snitch_stream.stride_pattern"() {"ub" = [#builtin.int<2>, #builtin.int<3>], "strides" = [#builtin.int<24>, #builtin.int<8>], "dm" = #builtin.int<31>} : () -> !snitch_stream.stride_pattern_type | ||
// CHECK-NEXT: %0 = riscv.li 2 : () -> !riscv.reg<> | ||
// CHECK-NEXT: %1 = riscv.li 3 : () -> !riscv.reg<> | ||
// CHECK-NEXT: %2 = riscv.li 24 : () -> !riscv.reg<> | ||
// CHECK-NEXT: %3 = riscv.li 8 : () -> !riscv.reg<> | ||
// CHECK-NEXT: %4 = riscv.addi %0, -1 : (!riscv.reg<>) -> !riscv.reg<> | ||
// CHECK-NEXT: %5 = riscv.addi %1, -1 : (!riscv.reg<>) -> !riscv.reg<> | ||
// CHECK-NEXT: "snitch.ssr_set_dimension_bound"(%4) {"dm" = #builtin.int<31>, "dimension" = #builtin.int<0>} : (!riscv.reg<>) -> () | ||
// CHECK-NEXT: "snitch.ssr_set_dimension_bound"(%5) {"dm" = #builtin.int<31>, "dimension" = #builtin.int<1>} : (!riscv.reg<>) -> () | ||
// CHECK-NEXT: "snitch.ssr_set_dimension_stride"(%2) {"dm" = #builtin.int<31>, "dimension" = #builtin.int<0>} : (!riscv.reg<>) -> () | ||
// CHECK-NEXT: %6 = riscv.mul %4, %2 : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<> | ||
// CHECK-NEXT: %7 = riscv.sub %3, %6 : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<> | ||
// CHECK-NEXT: "snitch.ssr_set_dimension_stride"(%7) {"dm" = #builtin.int<31>, "dimension" = #builtin.int<1>} : (!riscv.reg<>) -> () |
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git got confused by the {{.*}} changes, but the only meaningful change is the addition of riscv.li 0
, which will be optimised out anyway
Codecov ReportAll modified and coverable lines are covered by tests ✅
... and 7 files with indirect coverage changes 📢 Thoughts on this report? Let us know! |
I'll double check that this works on simulator before merging, looking to merge today |
tested in the experiments repo that this works