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[ARM64] [Windows] Mark block address as taken when expanding catchrets
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This fixes issue llvm#109250

The issue happens during the `MachineBlockPlacement` pass.
The block, whose address was previously not taken, is deemed redundant
by the pass and subsequently replaced using
`MachineBasicBlock::ReplaceUsesOfBlockWith` in `BranchFolding`.

ReplaceUsesOfBlockWith only replaces uses in the terminator.
However, `expandPostRAPseudo` introduces new block uses
when expanding catchrets. These uses do not get replaced, which results
in undefined label errors later on.

Marking the block addresss as taken prevents the replacement of the block,
without also replacing non-terminator uses.
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momo5502 committed Sep 30, 2024
1 parent a87640c commit b02e3d9
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Showing 4 changed files with 101 additions and 2 deletions.
1 change: 1 addition & 0 deletions llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1994,6 +1994,7 @@ bool AArch64InstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
.addReg(AArch64::X0)
.addMBB(TargetMBB)
.addImm(0);
TargetMBB->setMachineBlockAddressTaken();
return true;
}

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3 changes: 2 additions & 1 deletion llvm/test/CodeGen/AArch64/pr58516.ll
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,8 @@ define void @osfx(ptr %this) comdat personality ptr @__CxxFrameHandler3 {
; CHECK-NEXT: // %bb.1: // %invoke.cont12
; CHECK-NEXT: str wzr, [x20]
; CHECK-NEXT: str wzr, [x21]
; CHECK-NEXT: .LBB0_2: // %try.cont
; CHECK-NEXT: .LBB0_2: // Block address taken
; CHECK-NEXT: // %try.cont
; CHECK-NEXT: $ehgcr_0_2:
; CHECK-NEXT: .seh_startepilogue
; CHECK-NEXT: sub sp, x29, #24
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97 changes: 97 additions & 0 deletions llvm/test/CodeGen/AArch64/wineh-catchret-label-generation.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,97 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple aarch64-unknown-windows-msvc %s -o - | FileCheck %s

declare i32 @__CxxFrameHandler3(...)

declare void @llvm.seh.try.begin() #0

define fastcc ptr @test_function(i1 %0, ptr %_Fmtfl.i.i, i1 %1) personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: test_function:
; CHECK: .Lfunc_begin0:
; CHECK-NEXT: .seh_proc test_function
; CHECK-NEXT: .seh_handler __CxxFrameHandler3, @unwind, @except
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: stp x29, x30, [sp, #-32]! // 16-byte Folded Spill
; CHECK-NEXT: .seh_save_fplr_x 32
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: .seh_set_fp
; CHECK-NEXT: .seh_endprologue
; CHECK-NEXT: mov x3, #-2 // =0xfffffffffffffffe
; CHECK-NEXT: stur x3, [x29, #16]
; CHECK-NEXT: tbz w0, #0, .LBB0_3
; CHECK-NEXT: // %bb.1: // %invoke.cont.i124
; CHECK-NEXT: mov x0, x1
; CHECK-NEXT: b .LBB0_4
; CHECK-NEXT: .LBB0_2: // Block address taken
; CHECK-NEXT: // %some-block
; CHECK-NEXT: $ehgcr_0_2:
; CHECK-NEXT: .LBB0_3: // %left-block526
; CHECK-NEXT: mov x0, xzr
; CHECK-NEXT: .LBB0_4: // %common.ret1
; CHECK-NEXT: .seh_startepilogue
; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_fplr_x 32
; CHECK-NEXT: .seh_endepilogue
; CHECK-NEXT: ret
; CHECK-NEXT: .seh_endfunclet
; CHECK-NEXT: .seh_handlerdata
; CHECK-NEXT: .word ($cppxdata$test_function)@IMGREL
; CHECK-NEXT: .text
; CHECK-NEXT: .seh_endproc
; CHECK-NEXT: .def "?catch$5@?0?test_function@4HA";
; CHECK-NEXT: .scl 3;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: "?catch$5@?0?test_function@4HA":
; CHECK-NEXT: .seh_proc "?catch$5@?0?test_function@4HA"
; CHECK-NEXT: .seh_handler __CxxFrameHandler3, @unwind, @except
; CHECK-NEXT: .LBB0_5: // %catch.i
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .seh_save_fplr_x 16
; CHECK-NEXT: .seh_endprologue
; CHECK-NEXT: adrp x0, .LBB0_2
; CHECK-NEXT: add x0, x0, .LBB0_2
; CHECK-NEXT: .seh_startepilogue
; CHECK-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: .seh_save_fplr_x 16
; CHECK-NEXT: .seh_endepilogue
; CHECK-NEXT: ret
entry:
br i1 %0, label %right-block527, label %left-block526

common.ret1:
%common.ret1.op = phi ptr [ null, %left-block530 ], [ null, %some-block ], [ %_Fmtfl.i.i, %invoke.cont.i124 ], [ null, %left-block526 ]
ret ptr %common.ret1.op

invoke.cont.i124:
%.not657 = icmp eq i32 1, 0
br i1 %.not657, label %some-block, label %common.ret1

catch.dispatch.i:
%2 = catchswitch within none [label %catch.i] unwind to caller

catch.i:
%3 = catchpad within %2 [ptr null, i32 0, ptr null]
catchret from %3 to label %some-block

some-block:
br label %common.ret1

left-block526:
br i1 %1, label %common.ret1, label %left-block530

right-block527:
invoke void @llvm.seh.try.begin()
to label %invoke.cont.i124 unwind label %catch.dispatch.i

left-block530:
%.not = icmp eq i32 0, 0
br label %common.ret1
}

attributes #0 = { nounwind willreturn memory(write) }

!llvm.module.flags = !{!0}

!0 = !{i32 2, !"eh-asynch", i32 1}
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/wineh-try-catch.ll
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@
; CHECK-LABEL: .Ltmp0:
; CHECK: bl "?func2@@YAHXZ

; CHECK: [[CATCHRETDEST:.LBB0_[0-9]+]]: // %catchret.dest
; CHECK: [[CATCHRETDEST:.LBB0_[0-9]+]]: // Block address taken

; Check the catch funclet.
; CHECK-LABEL: "?catch$4@?0??func@@YAHXZ@4HA":
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