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Arm64 Backend Basic Arithmetic #275

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27 changes: 20 additions & 7 deletions aeneas/src/arm64/Arm64Backend.v3
Original file line number Diff line number Diff line change
Expand Up @@ -52,14 +52,15 @@ class Arm64Backend extends MachBackend {
}
asm = Arm64Assembler.new(w);
patcher = Arm64AddrPatcher.new(w, mach, asm);
codegen = SsaArm64Gen.new(context, mach, asm, w, dwarf);
codegen = SsaArm64Gen.new(context, mach, asm, w, dwarf, patcher);

if (compiler.useGlobalRegAllocMatcher != VstMatcher.None) allocateRegsGlobal = GlobalRegAlloc.new(MRegs.SET, codegen).allocate;
if (compiler.LocalRegAlloc) allocateRegs = LocalRegAlloc.new(MRegs.SET, codegen).allocate;
else allocateRegs = SimpleRegAlloc.new(MRegs.SET, codegen).allocate;
}

// Override MachBackend

// Override MachBackend
def genEntryStub() {
def main = prog.getMain().asMethod();
def frame = computeFrameSize(getFrame(main.ssa));
Expand All @@ -75,6 +76,7 @@ class Arm64Backend extends MachBackend {
// Exit successfully
asm_exit_code(0);
}

def genCodeFromSsa() {
var frame = getFrame(context.method.ssa);
var rtsrc = mach.runtime.src;
Expand All @@ -87,6 +89,7 @@ class Arm64Backend extends MachBackend {
codegen.assembleInstrs();
if (rtsrc != null) rtsrc.recordFrameEnd(w.endOffset());
}

def patchCodeAddrArm64(w: DataWriter, a: Addr, kind: Arm64PatchKind, posAddr: int) {
def abs = mach.absolute(a);
if (CLOptions.PRINT_PATCH.val) {
Expand All @@ -101,12 +104,23 @@ class Arm64Backend extends MachBackend {
}
patcher.patch(kind, posAddr, abs);
}

def genSignalHandlerStub() {
unimplemented();
}

def genFatalStub(ex: string, addr: Addr) {
unimplemented();
}

// Methods that must be provided by each OS target
def genSigHandlerInstall(signo: int, handler: Addr);
def asm_exit_r(r: Arm64Gpr);
def asm_exit_code(code: int);
def genTestOutput(main: IrMethod, frame: MachFrame);

// Helper functions

// Returns call frame for an SsaGraph
def getFrame(ssa: SsaGraph) -> MachFrame {
return MachFrame.new(Arm64VirgilCallConv.getForGraph(mach, ssa), mach.data.addrAlign, mach.refSize);
Expand All @@ -117,12 +131,15 @@ class Arm64Backend extends MachBackend {
frame.frameSize = mach.alignTo((frame.slots() + 1) * mach.refSize + mach.code.addressSize, mach.stackAlign);
return frame;
}

def genMainInit(frame: MachFrame) {
unimplemented();
}

def unimplemented() {
mach.fail("unimplemented");
}

def genTestInputs(main: IrMethod, frame: MachFrame) {
// "argc" is on the top of the stack on arm64-linux
asm.ldrd_r_r_i(Regs.R8, Regs.SP, 0); // load "argc"
Expand Down Expand Up @@ -180,14 +197,10 @@ class Arm64Backend extends MachBackend {
endAddr.absolute = w.endAddr();
}
}

def loc_gpr(frame: MachFrame, loc: int) -> Arm64Gpr {
var r = MRegs.toGpr(loc);
if (r == null) return V3.fail(Strings.format1("expected GPR, but got %s", frame.conv.regSet.identify(loc)));
return r;
}
// Methods that must be provided by each OS target
def genSigHandlerInstall(signo: int, handler: Addr);
def asm_exit_r(r: Arm64Gpr);
def asm_exit_code(code: int);
def genTestOutput(main: IrMethod, frame: MachFrame);
}
8 changes: 5 additions & 3 deletions aeneas/src/arm64/Arm64RegSet.v3
Original file line number Diff line number Diff line change
Expand Up @@ -7,9 +7,9 @@
* Maps register allocation register values to register values used in assembling
*/
component Arm64RegSet {
private def gprCount = 31; // x0-x30
private def gprCount = 32; // x0-x30
private def sfrCount = 0; // TODO SIMD and floating point registers
private def allCount = 33; // TODO
private def allCount = 34; // TODO

private def regSets = Array<Array<byte>>.new(allCount);
private def regNames = Array<string>.new(allCount);
Expand Down Expand Up @@ -44,13 +44,15 @@ component Arm64RegSet {
def R25 = gpr("r25", Arm64Regs.R25, true), R26 = gpr("r26", Arm64Regs.R26, true);
def R27 = gpr("r27", Arm64Regs.R27, true), R28 = gpr("r28", Arm64Regs.R28, true);
// Frame Pointer
def R29 = gpr("r29", Arm64Regs.R29, false);
def R29 = gpr("r29", Arm64Regs.R29, true);
// Link Register
def R30 = gpr("r30", Arm64Regs.R30, false);

def physRegs = cursor;

def ALL = set("{all}", Arrays.concat(allocatableGprs, sfrs));
def NOT_PARAM = set("~{param}", [R8, R9, R10, R11, R12, R13, R14, R15, R17, R18, R19,
R20, R21, R22, R23, R24, R25, R26, R27, R28, R29]);

def SCRATCH_GPR = R16;

Expand Down
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