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Add 'negn_r' instruction to lib/asm/x86-64 #268

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merged 1 commit into from
Aug 2, 2024
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Add 'negn_r' instruction to lib/asm/x86-64 #268

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14 changes: 14 additions & 0 deletions lib/asm/x86-64/X86_64Assembler.v3
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Original file line number Diff line number Diff line change
Expand Up @@ -1001,6 +1001,20 @@ class X86_64Assembler(w: DataWriter, OP_REX: byte) {
def negq_m(a: X86_64Addr) -> this {
emit_rex_b_m_x(a, REX_W, 0xF7, 3);
}
def negb_r(a: X86_64Gpr) -> this {
emit_rex_b_r_x(a, NO_REX, 0xF6, 3);
}
def negw_r(a: X86_64Gpr) -> this {
emitb(PREFIX_W);
emit_rex_b_r_x(a, NO_REX, 0xF7, 3);
}
def negd_r(a: X86_64Gpr) -> this {
emit_rex_b_r_x(a, NO_REX, 0xF7, 3);
}
def negq_r(a: X86_64Gpr) -> this {
emit_rex_b_r_x(a, REX_W, 0xF7, 3);
}

def pushq_m(a: X86_64Addr) -> this {
emit_rex_b_m_x(a, NO_REX, 0xFF, 6);
}
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13 changes: 12 additions & 1 deletion test/asm/x86-64/X86_64AssemblerTestGen.v3
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Original file line number Diff line number Diff line change
Expand Up @@ -125,7 +125,7 @@ def main(a: Array<string>) -> int {
do_orn();
do_andn();
do_negn();

do_negn_r();
do_r_dq("xchg", do_r_r, asm.d.xchg_r_r, asm.q.xchg_r_r);
do_m_dq("xchg", do_m_r, asm.d.xchg_m_r, asm.q.xchg_m_r);
do_r_dq("xadd", do_r_r, asm.d.xadd_r_r, asm.q.xadd_r_r);
Expand Down Expand Up @@ -406,6 +406,17 @@ def do_negn() {
do_m("neg qword", asm.negq_m);
}

def do_negn_r() {
regSize = 8;
do_r("and byte", asm.negb_r);
regSize = 16;
do_r("and word", asm.negw_r);
regSize = 32;
do_r("and dword", asm.negd_r);
regSize = 64;
do_r("and qword", asm.negq_r);
}

def do_set() {
var buf = StringBuilder.new();
for (cond in X86_64Conds.all) {
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