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Refactor conv files using clang-format (#16340)
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### What's changed
Ran clang-format on all conv files. 

### Checklist
- [x] Post commit CI
[passes](https://github.com/tenstorrent/tt-metal/actions/runs/12544646202)
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@sankarmanoj-tt
sankarmanoj-tt authored Dec 31, 2024
1 parent 3755428 commit c4df003
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Showing 14 changed files with 1,051 additions and 754 deletions.
12 changes: 0 additions & 12 deletions .clang-format-ignore
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Original file line number Diff line number Diff line change
Expand Up @@ -70,18 +70,6 @@ ttnn/cpp/ttnn/operations/ccl/reduce_scatter/host/reduce_scatter_worker_builder.c
ttnn/cpp/ttnn/operations/ccl/reduce_scatter/host/reduce_scatter_worker_builder.hpp
ttnn/cpp/ttnn/operations/ccl/shared_with_host/hetergeneous_data_structs.hpp
ttnn/cpp/ttnn/operations/ccl/shared_with_host/sharded_tensor_addr_gen.hpp
ttnn/cpp/ttnn/operations/conv/conv2d/conv2d.cpp
ttnn/cpp/ttnn/operations/conv/conv2d/conv2d.hpp
ttnn/cpp/ttnn/operations/conv/conv2d/conv2d_pybind.cpp
ttnn/cpp/ttnn/operations/conv/conv2d/conv2d_utils.cpp
ttnn/cpp/ttnn/operations/conv/conv2d/conv2d_utils.hpp
ttnn/cpp/ttnn/operations/conv/conv2d/device/conv2d_op.cpp
ttnn/cpp/ttnn/operations/conv/conv2d/device/conv2d_op.hpp
ttnn/cpp/ttnn/operations/conv/conv2d/prepare_conv2d_weights.cpp
ttnn/cpp/ttnn/operations/conv/conv2d/prepare_conv2d_weights.hpp
ttnn/cpp/ttnn/operations/conv/conv_transpose2d/conv_transpose2d.cpp
ttnn/cpp/ttnn/operations/conv/conv_transpose2d/conv_transpose2d.hpp
ttnn/cpp/ttnn/operations/conv/conv_transpose2d/conv_transpose2d_pybind.cpp
ttnn/cpp/ttnn/operations/data_movement/sharded/device/kernels/dataflow/reader_unary_stick_layout_sharded_blocks_interleaved_start_id.cpp
ttnn/cpp/ttnn/operations/data_movement/sharded/interleaved_to_sharded/device/interleaved_to_sharded_op.cpp
ttnn/cpp/ttnn/operations/data_movement/sharded/interleaved_to_sharded/device/interleaved_to_sharded_program_factory.cpp
Expand Down
80 changes: 58 additions & 22 deletions ttnn/cpp/ttnn/operations/conv/conv2d/conv2d.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -26,8 +26,8 @@
using namespace tt;
namespace ttnn {
namespace operations::conv {
using sliding_window::SlidingWindowConfig;
using sliding_window::ParallelConfig;
using sliding_window::SlidingWindowConfig;

namespace conv2d {

Expand Down Expand Up @@ -55,7 +55,8 @@ Result conv2d(
const std::optional<const DeviceComputeKernelConfig>& compute_config_,
const std::optional<const MemoryConfig>& memory_config) {
const bool mm_conv = use_matmul_for_1x1_conv(kernel_size, stride, padding, dilation, groups);
const uint32_t output_height = ((input_height - kernel_size[0] - ((kernel_size[0] - 1 ) * (dilation[0] - 1)) + 2 * padding[0]) / stride[0]) + 1;
const uint32_t output_height =
((input_height - kernel_size[0] - ((kernel_size[0] - 1) * (dilation[0] - 1)) + 2 * padding[0]) / stride[0]) + 1;
const uint32_t output_width =
((input_width - kernel_size[1] - ((kernel_size[0] - 1) * (dilation[0] - 1)) + 2 * padding[1]) / stride[1]) + 1;

Expand Down Expand Up @@ -105,26 +106,28 @@ Result conv2d(
uint32_t round_up_size = !use_non_tile_height ? tt::constants::TILE_HEIGHT : 1;
uint32_t nhw_out = batch_size * output_height * output_width;
uint32_t out_channels_padded = tt::round_up(
out_channels,
get_num_cores_channels_from_parallel_config(output_parallel_config) * tt::constants::TILE_WIDTH);
if(is_non_tile_mul_width) {
out_channels, get_num_cores_channels_from_parallel_config(output_parallel_config) * tt::constants::TILE_WIDTH);
if (is_non_tile_mul_width) {
out_channels_padded = tt::round_up(out_channels, 32);
}
MemoryConfig conv_out_memory_config = create_sharded_memory_config_from_parallel_config(
ttnn::Shape(std::array<uint32_t, 4>{1, 1, nhw_out, out_channels_padded}),
output_parallel_config,
round_up_size);
ParallelConfig largest_parallel_config = output_parallel_config.grid.num_cores() > parallel_config.grid.num_cores() ? output_parallel_config : parallel_config;
ParallelConfig largest_parallel_config = output_parallel_config.grid.num_cores() > parallel_config.grid.num_cores()
? output_parallel_config
: parallel_config;

OptimizedConvParallelizationConfig opt_conv_op_parallel_config = determine_conv_op_parallel_config_from_conv_output_mem_config(
conv_out_memory_config,
get_num_cores_nhw_from_parallel_config(largest_parallel_config),
get_num_cores_channels_from_parallel_config(largest_parallel_config));
OptimizedConvParallelizationConfig opt_conv_op_parallel_config =
determine_conv_op_parallel_config_from_conv_output_mem_config(
conv_out_memory_config,
get_num_cores_nhw_from_parallel_config(largest_parallel_config),
get_num_cores_channels_from_parallel_config(largest_parallel_config));

uint32_t in_channels_padded = tt::round_up(
in_channels,
get_num_cores_channels_from_parallel_config(parallel_config) * conv_config.input_channels_alignment);
if(is_non_tile_mul_width){
if (is_non_tile_mul_width) {
in_channels_padded = tt::round_up(in_channels, conv_config.input_channels_alignment);
}

Expand Down Expand Up @@ -191,8 +194,8 @@ Result conv2d(

if (bypass_halo) {
if (input_tensor_post_tm.layout() == Layout::TILE) {
input_tensor_post_tm = ttnn::to_layout(
input_tensor_post_tm, Layout::ROW_MAJOR, std::nullopt, std::nullopt, device);
input_tensor_post_tm =
ttnn::to_layout(input_tensor_post_tm, Layout::ROW_MAJOR, std::nullopt, std::nullopt, device);
}
} else {
Tensor halo_output = ttnn::halo(
Expand All @@ -207,7 +210,7 @@ Result conv2d(
!use_non_tile_height);

if (conv_config.deallocate_activation) {
input_tensor_post_tm.deallocate(/*force*/true);
input_tensor_post_tm.deallocate(/*force*/ true);
}

input_tensor_post_tm = std::move(halo_output);
Expand Down Expand Up @@ -281,7 +284,7 @@ Result Conv2dOperation::invoke(
uint8_t queue_id,
const ttnn::Tensor& input_tensor,
const ttnn::Tensor& weight_tensor,
Device * device,
Device* device,
uint32_t in_channels,
uint32_t out_channels,
uint32_t batch_size,
Expand All @@ -295,15 +298,32 @@ Result Conv2dOperation::invoke(
std::optional<const ttnn::Tensor> bias_tensor,
const std::optional<const Conv2dConfig>& conv_config_,
const std::optional<const DeviceComputeKernelConfig>& compute_config_,
const std::optional<const MemoryConfig>& memory_config){
return conv2d(input_tensor, weight_tensor, device, in_channels, out_channels, batch_size, input_height, input_width, kernel_size, stride, padding, dilation, groups, std::move(bias_tensor), std::move(conv_config_), std::move(compute_config_), memory_config);
const std::optional<const MemoryConfig>& memory_config) {
return conv2d(
input_tensor,
weight_tensor,
device,
in_channels,
out_channels,
batch_size,
input_height,
input_width,
kernel_size,
stride,
padding,
dilation,
groups,
std::move(bias_tensor),
std::move(conv_config_),
std::move(compute_config_),
memory_config);
}

Result Conv2dOperation::invoke(
uint8_t queue_id,
const ttnn::Tensor& input_tensor,
const ttnn::Tensor& weight_tensor,
MeshDevice * device,
MeshDevice* device,
uint32_t in_channels,
uint32_t out_channels,
uint32_t batch_size,
Expand All @@ -317,11 +337,27 @@ Result Conv2dOperation::invoke(
std::optional<const ttnn::Tensor> bias_tensor,
const std::optional<const Conv2dConfig>& conv_config_,
const std::optional<const DeviceComputeKernelConfig>& compute_config_,
const std::optional<const MemoryConfig>& memory_config){
return conv2d(input_tensor, weight_tensor, device, in_channels, out_channels, batch_size, input_height, input_width, kernel_size, stride, padding, dilation, groups, std::move(bias_tensor), std::move(conv_config_), std::move(compute_config_), memory_config);
const std::optional<const MemoryConfig>& memory_config) {
return conv2d(
input_tensor,
weight_tensor,
device,
in_channels,
out_channels,
batch_size,
input_height,
input_width,
kernel_size,
stride,
padding,
dilation,
groups,
std::move(bias_tensor),
std::move(conv_config_),
std::move(compute_config_),
memory_config);
}


} // namespace conv2d
} // namespace operations
} // namespace operations::conv
} // namespace ttnn
13 changes: 6 additions & 7 deletions ttnn/cpp/ttnn/operations/conv/conv2d/conv2d.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ template <typename T>
Result conv2d(
const ttnn::Tensor& input_tensor,
const ttnn::Tensor& weight_tensor,
T * device,
T* device,
uint32_t in_channels,
uint32_t out_channels,
uint32_t batch_size,
Expand All @@ -39,13 +39,12 @@ Result conv2d(
const std::optional<const DeviceComputeKernelConfig>& compute_config_ = std::nullopt,
const std::optional<const MemoryConfig>& memory_config = std::nullopt);


struct Conv2dOperation{
struct Conv2dOperation {
static Result invoke(
uint8_t queue_id,
const ttnn::Tensor& input_tensor,
const ttnn::Tensor& weight_tensor,
Device * device,
Device* device,
uint32_t in_channels,
uint32_t out_channels,
uint32_t batch_size,
Expand All @@ -65,7 +64,7 @@ struct Conv2dOperation{
uint8_t queue_id,
const ttnn::Tensor& input_tensor,
const ttnn::Tensor& weight_tensor,
MeshDevice * device,
MeshDevice* device,
uint32_t in_channels,
uint32_t out_channels,
uint32_t batch_size,
Expand All @@ -85,6 +84,6 @@ struct Conv2dOperation{
} // namespace operations::conv
} // namespace ttnn

namespace ttnn{
constexpr auto conv2d = ttnn::register_operation<"ttnn::conv2d", operations::conv::conv2d::Conv2dOperation>();
namespace ttnn {
constexpr auto conv2d = ttnn::register_operation<"ttnn::conv2d", operations::conv::conv2d::Conv2dOperation>();
}
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