#4984: Fix L1_KERNEL_CONFIG_BASE

tenstorrent · Sep 12, 2024 · a80407c · a80407c
1 parent bae3b81
commit a80407c
Show file tree

Hide file tree

Showing 5 changed files with 4 additions and 5 deletions.
diff --git a/tt_metal/hostdevcommon/common_runtime_address_map.h b/tt_metal/hostdevcommon/common_runtime_address_map.h
@@ -37,7 +37,7 @@ static_assert (PROFILER_FULL_HOST_BUFFER_SIZE_PER_RISC > kernel_profiler::PROFIL
 // Kernel config buffer is WIP
 // Size is presently based on the old sizes of the RTAs + CB config + Sems
 // plus some extra space freed up in the mem map
-constexpr static std::uint32_t L1_KERNEL_CONFIG_BASE = MEM_MAP_END;
+constexpr static std::uint32_t L1_KERNEL_CONFIG_BASE = MEM_MAILBOX_END;
 constexpr static std::uint32_t L1_KERNEL_CONFIG_SIZE = 4 * 1024 + 256 + 128 + 512;
 
 constexpr static std::uint32_t IDLE_ERISC_L1_KERNEL_CONFIG_BASE = 32 * 1024;

diff --git a/tt_metal/hw/inc/blackhole/dev_mem_map.h b/tt_metal/hw/inc/blackhole/dev_mem_map.h
@@ -53,7 +53,7 @@
 #define MEM_L1_BARRIER 12
 #define MEM_MAILBOX_BASE 16
 // Magic size must be big enough to hold dev_msgs_t.  static_asserts will fire if this is too small
-#define MEM_MAILBOX_SIZE 5 * 4 * 512 + 4 * 32 + 1364
+#define MEM_MAILBOX_SIZE (5 * 4 * 512 + 4 * 32 + 8 + 1356 + 12)
 #define MEM_MAILBOX_END (MEM_MAILBOX_BASE + MEM_MAILBOX_SIZE)
 #define MEM_IERISC_MAILBOX_BASE 1024
 #define MEM_IERISC_MAILBOX_END (MEM_IERISC_MAILBOX_BASE + 128)

diff --git a/tt_metal/hw/inc/dev_msgs.h b/tt_metal/hw/inc/dev_msgs.h
@@ -235,7 +235,6 @@ struct dprint_buf_msg_t {
 };
 
 
-// NOC aligment max from BH
 static constexpr uint32_t TT_ARCH_MAX_NOC_WRITE_ALIGNMENT = 16;
 
 // TODO: when device specific headers specify number of processors

diff --git a/tt_metal/hw/inc/grayskull/dev_mem_map.h b/tt_metal/hw/inc/grayskull/dev_mem_map.h
@@ -55,7 +55,7 @@
 #define MEM_L1_BARRIER 12
 #define MEM_MAILBOX_BASE 16
 // Magic size must be big enough to hold dev_msgs_t.  static_asserts will fire if this is too small
-#define MEM_MAILBOX_SIZE 5 * 2 * 1024 + 128 + 1364
+#define MEM_MAILBOX_SIZE (5 * 4 * 512 + 4 * 32 + 8 + 1356 + 12)
 #define MEM_MAILBOX_END (MEM_MAILBOX_BASE + MEM_MAILBOX_SIZE)
 #define MEM_IERISC_MAILBOX_BASE 0
 #define MEM_IERISC_MAILBOX_END 0

diff --git a/tt_metal/hw/inc/wormhole/dev_mem_map.h b/tt_metal/hw/inc/wormhole/dev_mem_map.h
@@ -57,7 +57,7 @@
 #define MEM_L1_BARRIER 12
 #define MEM_MAILBOX_BASE 16
 // Magic size must be big enough to hold dev_msgs_t.  static_asserts will fire if this is too small
-#define MEM_MAILBOX_SIZE 5 * 4 * 512 + 4 * 32 + 1364
+#define MEM_MAILBOX_SIZE (5 * 4 * 512 + 4 * 32 + 8 + 1356 + 12)
 #define MEM_MAILBOX_END (MEM_MAILBOX_BASE + MEM_MAILBOX_SIZE)
 #define MEM_IERISC_MAILBOX_BASE 1024
 #define MEM_IERISC_MAILBOX_END (MEM_IERISC_MAILBOX_BASE + 128)
-Original file line number
+Diff line change
@@ Expand Up / @@ -235,7 +235,6 @@ struct dprint_buf_msg_t { @@
     };
-    // NOC aligment max from BH
     static constexpr uint32_t TT_ARCH_MAX_NOC_WRITE_ALIGNMENT = 16;
     // TODO: when device specific headers specify number of processors
@@ Expand Down @@