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broskoTT committed Dec 11, 2024
1 parent 8e49222 commit 7545051
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Showing 10 changed files with 2 additions and 32 deletions.
5 changes: 0 additions & 5 deletions tt_metal/llrt/blackhole/bh_hal_active_eth.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,6 @@ HalCoreInfoType create_active_eth_mem_map() {

mem_map_bases.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = 0x0; // Anything better to use?
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = eth_l1_mem::address_map::ERISC_BARRIER_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] =
eth_l1_mem::address_map::ERISC_MEM_MAILBOX_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = GET_ETH_MAILBOX_ADDRESS_HOST(launch);
Expand All @@ -44,16 +43,13 @@ HalCoreInfoType create_active_eth_mem_map() {
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::GO_MSG)] = GET_ETH_MAILBOX_ADDRESS_HOST(go_message);
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH_MSG_BUFFER_RD_PTR)] =
GET_ETH_MAILBOX_ADDRESS_HOST(launch_msg_rd_ptr);
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::FW_VERSION_ADDR)] =
eth_l1_mem::address_map::FW_VERSION_ADDR;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BANK_TO_NOC_SCRATCH)] =
eth_l1_mem::address_map::ERISC_MEM_BANK_TO_NOC_SCRATCH;

std::vector<std::uint32_t> mem_map_sizes;
mem_map_sizes.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BASE)] =
eth_l1_mem::address_map::MAX_SIZE; // Anything better to use?
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = eth_l1_mem::address_map::ERISC_BARRIER_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] =
eth_l1_mem::address_map::ERISC_MEM_MAILBOX_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = sizeof(launch_msg_t);
Expand All @@ -66,7 +62,6 @@ HalCoreInfoType create_active_eth_mem_map() {
eth_l1_mem::address_map::MAX_SIZE - eth_l1_mem::address_map::ERISC_L1_UNRESERVED_BASE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::GO_MSG)] = sizeof(go_msg_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH_MSG_BUFFER_RD_PTR)] = sizeof(std::uint32_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::FW_VERSION_ADDR)] = sizeof(std::uint32_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BANK_TO_NOC_SCRATCH)] =
eth_l1_mem::address_map::ERISC_MEM_BANK_TO_NOC_SIZE;

Expand Down
2 changes: 0 additions & 2 deletions tt_metal/llrt/blackhole/bh_hal_idle_eth.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,6 @@ HalCoreInfoType create_idle_eth_mem_map() {

mem_map_bases.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_ETH_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = MEM_L1_BARRIER;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_IERISC_MAILBOX_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = GET_IERISC_MAILBOX_ADDRESS_HOST(launch);
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = GET_IERISC_MAILBOX_ADDRESS_HOST(watcher);
Expand All @@ -54,7 +53,6 @@ HalCoreInfoType create_idle_eth_mem_map() {
std::vector<std::uint32_t> mem_map_sizes;
mem_map_sizes.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_ETH_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = sizeof(std::uint32_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_IERISC_MAILBOX_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = sizeof(launch_msg_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = sizeof(watcher_msg_t);
Expand Down
2 changes: 0 additions & 2 deletions tt_metal/llrt/blackhole/bh_hal_tensix.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,6 @@ HalCoreInfoType create_tensix_mem_map() {

mem_map_bases.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_L1_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = MEM_L1_BARRIER;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_MAILBOX_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = GET_MAILBOX_ADDRESS_HOST(launch);
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = GET_MAILBOX_ADDRESS_HOST(watcher);
Expand All @@ -51,7 +50,6 @@ HalCoreInfoType create_tensix_mem_map() {
std::vector<uint32_t> mem_map_sizes;
mem_map_sizes.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_L1_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = sizeof(uint32_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_MAILBOX_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = sizeof(launch_msg_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = sizeof(watcher_msg_t);
Expand Down
2 changes: 0 additions & 2 deletions tt_metal/llrt/grayskull/gs_hal.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,6 @@ void Hal::initialize_gs() {

mem_map_bases.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_L1_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = MEM_L1_BARRIER;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_MAILBOX_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = GET_MAILBOX_ADDRESS_HOST(launch);
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = GET_MAILBOX_ADDRESS_HOST(watcher);
Expand All @@ -66,7 +65,6 @@ void Hal::initialize_gs() {
std::vector<uint32_t> mem_map_sizes;
mem_map_sizes.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_L1_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = sizeof(uint32_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_MAILBOX_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = sizeof(launch_msg_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = sizeof(watcher_msg_t);
Expand Down
3 changes: 1 addition & 2 deletions tt_metal/llrt/hal.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,6 @@ enum class HalProcessorClassType : uint8_t {

enum class HalL1MemAddrType : uint8_t {
BASE,
BARRIER,
MAILBOX,
LAUNCH,
WATCHER,
Expand All @@ -52,7 +51,7 @@ enum class HalL1MemAddrType : uint8_t {
FW_VERSION_ADDR, // Really only applicable to active eth core right now
LOCAL,
BANK_TO_NOC_SCRATCH,
COUNT // Keep this last so it always indicates number of enum options
COUNT // Keep this last so it always indicates number of enum options
};

enum class HalDramMemAddrType : uint8_t { DRAM_BARRIER = 0, COUNT = 1 };
Expand Down
9 changes: 0 additions & 9 deletions tt_metal/llrt/tt_cluster.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -252,15 +252,6 @@ void Cluster::open_driver(const bool &skip_driver_allocs) {
} else if (this->target_type_ == TargetDevice::Simulator) {
device_driver = std::make_unique<tt_SimulationDevice>(sdesc_path);
}
std::uint32_t dram_barrier_base = tt_metal::hal.get_dev_addr(tt_metal::HalDramMemAddrType::DRAM_BARRIER);
device_driver->set_device_dram_address_params(tt_device_dram_address_params{dram_barrier_base});

l1_address_params.tensix_l1_barrier_base = tt_metal::hal.get_dev_addr(tt_metal::HalProgrammableCoreType::TENSIX, tt_metal::HalL1MemAddrType::BARRIER);
if (tt_metal::hal.get_arch() != tt::ARCH::GRAYSKULL) {
l1_address_params.eth_l1_barrier_base = tt_metal::hal.get_dev_addr(tt_metal::HalProgrammableCoreType::ACTIVE_ETH, tt_metal::HalL1MemAddrType::BARRIER);
l1_address_params.fw_version_addr = tt_metal::hal.get_dev_addr(tt_metal::HalProgrammableCoreType::ACTIVE_ETH, tt_metal::HalL1MemAddrType::FW_VERSION_ADDR);
}
device_driver->set_device_l1_address_params(l1_address_params);

this->get_metal_desc_from_tt_desc(
device_driver->get_virtual_soc_descriptors(), device_driver->get_harvesting_masks_for_soc_descriptors());
Expand Down
5 changes: 0 additions & 5 deletions tt_metal/llrt/wormhole/wh_hal_active_eth.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,6 @@ HalCoreInfoType create_active_eth_mem_map() {

mem_map_bases.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = 0x0; // Anything better to use?
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = eth_l1_mem::address_map::ERISC_BARRIER_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] =
eth_l1_mem::address_map::ERISC_MEM_MAILBOX_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = GET_ETH_MAILBOX_ADDRESS_HOST(launch);
Expand All @@ -41,16 +40,13 @@ HalCoreInfoType create_active_eth_mem_map() {
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::GO_MSG)] = GET_ETH_MAILBOX_ADDRESS_HOST(go_message);
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH_MSG_BUFFER_RD_PTR)] =
GET_ETH_MAILBOX_ADDRESS_HOST(launch_msg_rd_ptr);
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::FW_VERSION_ADDR)] =
eth_l1_mem::address_map::FW_VERSION_ADDR;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BANK_TO_NOC_SCRATCH)] =
eth_l1_mem::address_map::ERISC_MEM_BANK_TO_NOC_SCRATCH;

std::vector<uint32_t> mem_map_sizes;
mem_map_sizes.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BASE)] =
eth_l1_mem::address_map::MAX_SIZE; // Anything better to use?
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = eth_l1_mem::address_map::ERISC_BARRIER_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] =
eth_l1_mem::address_map::ERISC_MEM_MAILBOX_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = sizeof(launch_msg_t);
Expand All @@ -63,7 +59,6 @@ HalCoreInfoType create_active_eth_mem_map() {
eth_l1_mem::address_map::MAX_SIZE - eth_l1_mem::address_map::ERISC_L1_UNRESERVED_BASE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::GO_MSG)] = sizeof(go_msg_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH_MSG_BUFFER_RD_PTR)] = sizeof(uint32_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::FW_VERSION_ADDR)] = sizeof(std::uint32_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BANK_TO_NOC_SCRATCH)] = eth_l1_mem::address_map::ERISC_MEM_BANK_TO_NOC_SIZE;

std::vector<std::vector<HalJitBuildConfig>> processor_classes(NumEthDispatchClasses);
Expand Down
2 changes: 0 additions & 2 deletions tt_metal/llrt/wormhole/wh_hal_idle_eth.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,6 @@ HalCoreInfoType create_idle_eth_mem_map() {

mem_map_bases.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_ETH_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = MEM_L1_BARRIER;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_IERISC_MAILBOX_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = GET_IERISC_MAILBOX_ADDRESS_HOST(launch);
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = GET_IERISC_MAILBOX_ADDRESS_HOST(watcher);
Expand All @@ -54,7 +53,6 @@ HalCoreInfoType create_idle_eth_mem_map() {
std::vector<uint32_t> mem_map_sizes;
mem_map_sizes.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_ETH_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = sizeof(std::uint32_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_IERISC_MAILBOX_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = sizeof(launch_msg_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = sizeof(watcher_msg_t);
Expand Down
2 changes: 0 additions & 2 deletions tt_metal/llrt/wormhole/wh_hal_tensix.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,6 @@ HalCoreInfoType create_tensix_mem_map() {

mem_map_bases.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_L1_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = MEM_L1_BARRIER;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_MAILBOX_BASE;
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = GET_MAILBOX_ADDRESS_HOST(launch);
mem_map_bases[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = GET_MAILBOX_ADDRESS_HOST(watcher);
Expand All @@ -52,7 +51,6 @@ HalCoreInfoType create_tensix_mem_map() {
std::vector<uint32_t> mem_map_sizes;
mem_map_sizes.resize(static_cast<std::size_t>(HalL1MemAddrType::COUNT));
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BASE)] = MEM_L1_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::BARRIER)] = sizeof(std::uint32_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::MAILBOX)] = MEM_MAILBOX_SIZE;
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::LAUNCH)] = sizeof(launch_msg_t);
mem_map_sizes[static_cast<std::size_t>(HalL1MemAddrType::WATCHER)] = sizeof(watcher_msg_t);
Expand Down
2 changes: 1 addition & 1 deletion tt_metal/third_party/umd
Submodule umd updated 48 files
+11 −4 .github/workflows/build-device.yml
+12 −0 CMakeLists.txt
+4 −0 device/CMakeLists.txt
+4 −0 device/api/umd/device/architecture_implementation.h
+25 −14 device/api/umd/device/blackhole_implementation.h
+29 −0 device/api/umd/device/chip/chip.h
+17 −0 device/api/umd/device/chip/local_chip.h
+17 −0 device/api/umd/device/chip/mock_chip.h
+17 −0 device/api/umd/device/chip/remote_chip.h
+64 −56 device/api/umd/device/cluster.h
+2 −0 device/api/umd/device/grayskull_implementation.h
+1 −1 device/api/umd/device/pci_device.hpp
+2 −0 device/api/umd/device/tt_core_coordinates.h
+1 −1 device/api/umd/device/tt_device/tt_device.h
+0 −10 device/api/umd/device/tt_simulation_device.h
+2 −2 device/api/umd/device/types/arch.h
+23 −26 device/api/umd/device/wormhole_implementation.h
+13 −0 device/blackhole/blackhole_implementation.cpp
+15 −0 device/chip/chip.cpp
+14 −0 device/chip/local_chip.cpp
+14 −0 device/chip/mock_chip.cpp
+14 −0 device/chip/remote_chip.cpp
+160 −129 device/cluster.cpp
+31 −12 device/coordinate_manager.cpp
+9 −0 device/grayskull/grayskull_implementation.cpp
+0 −14 device/mockup/tt_mockup_device.hpp
+0 −8 device/simulation/deprecated/tt_emulation_device.cpp
+0 −5 device/simulation/deprecated/tt_emulation_device.h
+0 −6 device/simulation/deprecated/tt_emulation_stub.cpp
+0 −4 device/simulation/deprecated/tt_versim_device.cpp
+0 −1 device/simulation/deprecated/tt_versim_device.h
+0 −5 device/simulation/deprecated/tt_versim_stub.cpp
+1 −22 device/simulation/tt_simulation_device.cpp
+10 −9 device/tlb.cpp
+1 −1 device/tt_device/tt_device.cpp
+13 −0 device/wormhole/wormhole_implementation.cpp
+69 −68 tests/api/test_chip.cpp
+34 −25 tests/api/test_cluster.cpp
+0 −10 tests/blackhole/test_bh_common.h
+25 −44 tests/blackhole/test_silicon_driver_bh.cpp
+0 −6 tests/galaxy/test_umd_concurrent_threads.cpp
+0 −6 tests/galaxy/test_umd_remote_api.cpp
+15 −15 tests/grayskull/test_silicon_driver.cpp
+1 −1 tests/microbenchmark/device_fixture.hpp
+26 −23 tests/microbenchmark/test_rw_tensix.cpp
+4 −4 tests/test_utils/stimulus_generators.hpp
+24 −46 tests/wormhole/test_silicon_driver_wh.cpp
+0 −10 tests/wormhole/test_wh_common.h

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