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#13030: Eliminate namespace pollution (#14312)
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@blozano-tt
blozano-tt authored Oct 26, 2024
1 parent 9f987fc commit 734c8c1
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Showing 228 changed files with 531 additions and 453 deletions.
18 changes: 9 additions & 9 deletions tests/tests_common/sfpu_helper/sfpu_helper.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -74,8 +74,8 @@ float ref_identity(float x) {
return x;
}

vector<uint32_t> sfpu(const std::vector<uint32_t> &src, std::function<float(float)> sfpu_func) {
vector<uint32_t> dst;
std::vector<uint32_t> sfpu(const std::vector<uint32_t> &src, std::function<float(float)> sfpu_func) {
std::vector<uint32_t> dst;

for (uint32_t el: src) {

Expand All @@ -98,13 +98,13 @@ vector<uint32_t> sfpu(const std::vector<uint32_t> &src, std::function<float(floa
}

// Helper functions
vector<uint32_t> create_random_ones_and_twos_vector_of_bfloat16(uint32_t num_bytes, int seed) {
std::vector<uint32_t> create_random_ones_and_twos_vector_of_bfloat16(uint32_t num_bytes, int seed) {
// Used for reciprocal, since binary vectors are filled with 0s and 1s, and recip of 0 is undefined,
// so then we just generate a vector of ones and twos

vector<uint32_t> src = create_random_binary_vector_of_bfloat16(num_bytes, seed);
std::vector<uint32_t> src = create_random_binary_vector_of_bfloat16(num_bytes, seed);

vector<uint32_t> dst;
std::vector<uint32_t> dst;

for (uint32_t el: src) {

Expand Down Expand Up @@ -148,7 +148,7 @@ bool is_close_rtol_0p175_atol_0p1(float a, float b) {
}

// SFPU maps -> relevant kernels, golden functions, comparison functions
static std::vector<string> sfpu_op =
static std::vector<std::string> sfpu_op =
{ "relu",
"exponential",
"reciprocal",
Expand All @@ -165,7 +165,7 @@ static std::vector<string> sfpu_op =
"identity"
};

const map<string, std::function<float(float)>> sfpu_op_to_function = {
const std::map<std::string, std::function<float(float)>> sfpu_op_to_function = {
{"relu", relu},
{"exponential", exponential},
{"reciprocal", reciprocal},
Expand All @@ -182,7 +182,7 @@ const map<string, std::function<float(float)>> sfpu_op_to_function = {
{"identity", ref_identity}
};

const map<string, std::function<vector<uint32_t>(uint32_t num_bytes, int seed)>> sfpu_op_to_init_func = {
const std::map<std::string, std::function<std::vector<uint32_t>(uint32_t num_bytes, int seed)>> sfpu_op_to_init_func = {
{"relu", create_random_vector_of_bfloat16_1_1},
{"exponential", create_random_binary_vector_of_bfloat16},
{"reciprocal", create_random_ones_and_twos_vector_of_bfloat16},
Expand All @@ -199,7 +199,7 @@ const map<string, std::function<vector<uint32_t>(uint32_t num_bytes, int seed)>>
{"identity", create_random_vector_of_bfloat16_1_1}
};

const map<string, std::function<bool(float a, float b)>> sfpu_op_to_comparison_function = {
const std::map<std::string, std::function<bool(float a, float b)>> sfpu_op_to_comparison_function = {
{"exponential", equal_within_two_sig_figs},
{"reciprocal", equal_within_absolute_tolerance_of_0p03},
{"gelu", is_close_0p015},
Expand Down
1 change: 1 addition & 0 deletions tests/tt_eager/ops/test_sfpu.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@
#include "ttnn/operations/eltwise/unary/common/unary_op_utils.hpp"
// #include "tt_gdb/tt_gdb.hpp"

using std::vector;

// SFPU maps -> relevant kernels, golden functions, comparison functions
std::map<std::string,std::map<std::string, std::string>> sfpu_op_to_hlk_op_name={};
Expand Down
1 change: 1 addition & 0 deletions tests/tt_eager/ops/test_sliding_window_ops.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
#include "ttnn/operations/numpy/functions.hpp"
#include "ttnn/tensor/types.hpp"

using std::vector;
using tt::tt_metal::LegacyShape;
using tt::tt_metal::Tensor;
using namespace ttnn::operations::sliding_window;
Expand Down
1 change: 1 addition & 0 deletions ...tal/tt_metal/perf_microbenchmark/10_dram_read_remote_cb_sync/test_dram_read_remote_cb.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,7 @@
#include "tests/tt_metal/tt_metal/unit_tests_common/compute/matmul/matmul_utils.hpp"
#include <yaml-cpp/yaml.h>

using std::vector;
using namespace tt;
using std::chrono::duration_cast;
using std::chrono::microseconds;
Expand Down
1 change: 1 addition & 0 deletions tests/tt_metal/tt_metal/perf_microbenchmark/1_compute_mm/test_compute_mm.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@
#include "tests/tt_metal/tt_metal/unit_tests_common/compute/matmul/matmul_utils.hpp"
#include "tt_metal/common/work_split.hpp"

using std::vector;
using namespace tt;
////////////////////////////////////////////////////////////////////////////////
// This benchmark measures the compute performance of matmul. When in the slow
Expand Down
1 change: 1 addition & 0 deletions tests/tt_metal/tt_metal/perf_microbenchmark/7_kernel_launch/test_kernel_launch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@
#include "tt_metal/impl/dispatch/command_queue.hpp"
#include "tt_metal/tt_metal/perf_microbenchmark/common/util.hpp"

using std::vector;
using namespace tt;
using namespace tt::tt_metal;
using std::chrono::duration_cast;
Expand Down
4 changes: 2 additions & 2 deletions tests/tt_metal/tt_metal/perf_microbenchmark/common/util.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ inline uint64_t get_t0_to_any_riscfw_end_cycle(tt::tt_metal::Device *device, con
hal.get_dev_addr<dprint_buf_msg_t *>(HalProgrammableCoreType::TENSIX, HalL1MemAddrType::DPRINT);

// This works for tensix only, will need to be updated for eth
vector<uint64_t> print_buffer_addrs = {
std::vector<uint64_t> print_buffer_addrs = {
reinterpret_cast<uint64_t>(dprint_msg->data[DPRINT_RISCV_INDEX_NC]),
reinterpret_cast<uint64_t>(dprint_msg->data[DPRINT_RISCV_INDEX_BR]),
reinterpret_cast<uint64_t>(dprint_msg->data[DPRINT_RISCV_INDEX_TR0]),
Expand All @@ -37,7 +37,7 @@ inline uint64_t get_t0_to_any_riscfw_end_cycle(tt::tt_metal::Device *device, con
};
for (const auto &worker_core : worker_cores_used_in_program) {
for (const auto &buffer_addr : print_buffer_addrs) {
vector<std::uint32_t> profile_buffer;
std::vector<std::uint32_t> profile_buffer;
uint32_t end_index;
uint32_t dropped_marker_counter;
profile_buffer = tt::llrt::read_hex_vec_from_core(device_id, worker_core, buffer_addr, DPRINT_BUFFER_SIZE);
Expand Down
68 changes: 34 additions & 34 deletions tests/tt_metal/tt_metal/perf_microbenchmark/dispatch/common.h
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Original file line number Diff line number Diff line change
Expand Up @@ -28,8 +28,8 @@ struct one_core_data_t {
CoreCoord phys_core;
int bank_id;
int bank_offset;
vector<bool> valid;
vector<uint32_t> data;
std::vector<bool> valid;
std::vector<uint32_t> data;
};

class DeviceData {
Expand Down Expand Up @@ -342,7 +342,7 @@ inline bool DeviceData::validate_one_core(Device *device,
uint32_t result_addr) {
int fail_count = 0;
const std::vector<uint32_t>& dev_data = one_core_data.data;
const vector<bool>& dev_valid = one_core_data.valid;
const std::vector<bool>& dev_valid = one_core_data.valid;
const CoreCoord logical_core = one_core_data.logical_core;
const CoreCoord phys_core = one_core_data.phys_core;
const CoreType core_type = one_core_data.core_type;
Expand All @@ -366,7 +366,7 @@ inline bool DeviceData::validate_one_core(Device *device,

// Read results from device and compare to expected for this core.
result_addr += bank_offset;
vector<uint32_t> results = tt::llrt::read_hex_vec_from_core(device->id(), phys_core, result_addr, size_bytes);
std::vector<uint32_t> results = tt::llrt::read_hex_vec_from_core(device->id(), phys_core, result_addr, size_bytes);

log_info(tt::LogTest, "Validating {} bytes from {} bank {} log_core {}: phys_core: {} at addr: 0x{:x}",
size_bytes, core_string, bank_id, logical_core.str(), phys_core.str(), result_addr);
Expand Down Expand Up @@ -536,7 +536,7 @@ inline uint32_t get_min_required_buffer_addr(Device *device, bool is_dram){
return min_required_positive_offset;
}

inline void generate_random_payload(vector<uint32_t>& cmds,
inline void generate_random_payload(std::vector<uint32_t>& cmds,
uint32_t length) {

for (uint32_t i = 0; i < length; i++) {
Expand All @@ -545,7 +545,7 @@ inline void generate_random_payload(vector<uint32_t>& cmds,
}
}

inline void generate_random_payload(vector<uint32_t>& cmds,
inline void generate_random_payload(std::vector<uint32_t>& cmds,
const CoreRange& workers,
DeviceData& data,
uint32_t length_words,
Expand Down Expand Up @@ -579,7 +579,7 @@ inline void generate_random_payload(vector<uint32_t>& cmds,
// Generate a random payload for a paged write command. Note: Doesn't currently support using the base_addr here.
inline void generate_random_paged_payload(Device *device,
CQDispatchCmd cmd,
vector<uint32_t>& cmds,
std::vector<uint32_t>& cmds,
DeviceData& data,
uint32_t start_page,
bool is_dram) {
Expand Down Expand Up @@ -618,8 +618,8 @@ inline void generate_random_paged_payload(Device *device,
}
}

inline void generate_random_packed_payload(vector<uint32_t>& cmds,
vector<CoreCoord>& worker_cores,
inline void generate_random_packed_payload(std::vector<uint32_t>& cmds,
std::vector<CoreCoord>& worker_cores,
DeviceData& data,
uint32_t size_words,
bool repeat = false) {
Expand All @@ -628,7 +628,7 @@ inline void generate_random_packed_payload(vector<uint32_t>& cmds,
const uint32_t bank_id = 0; // No interleaved pages here.

bool first_core = true;
vector<uint32_t>results;
std::vector<uint32_t>results;
CoreCoord first_worker = worker_cores[0];
for (uint32_t i = 0; i < size_words; i++) {
uint32_t datum = (use_coherent_data_g) ? ((first_worker.x << 16) | (first_worker.y << 24) | coherent_count++) : std::rand();
Expand All @@ -648,7 +648,7 @@ inline void generate_random_packed_payload(vector<uint32_t>& cmds,
}
}

inline void generate_random_packed_large_payload(vector<uint32_t>& generated_data,
inline void generate_random_packed_large_payload(std::vector<uint32_t>& generated_data,
CoreRange range,
DeviceData& data,
uint32_t size_words) {
Expand Down Expand Up @@ -676,7 +676,7 @@ inline void generate_random_packed_large_payload(vector<uint32_t>& generated_dat
}
}

inline void add_bare_dispatcher_cmd(vector<uint32_t>& cmds,
inline void add_bare_dispatcher_cmd(std::vector<uint32_t>& cmds,
CQDispatchCmd cmd) {
static_assert(sizeof(CQDispatchCmd) % sizeof(uint32_t) == 0, "CQDispatchCmd size must be a multiple of uint32_t size");
const size_t num_uint32s = sizeof(CQDispatchCmd) / sizeof(uint32_t);
Expand All @@ -688,7 +688,7 @@ inline void add_bare_dispatcher_cmd(vector<uint32_t>& cmds,
}
}

inline size_t debug_prologue(vector<uint32_t>& cmds) {
inline size_t debug_prologue(std::vector<uint32_t>& cmds) {
size_t prior = cmds.size();

if (debug_g) {
Expand All @@ -707,7 +707,7 @@ inline size_t debug_prologue(vector<uint32_t>& cmds) {
return prior;
}

inline void debug_epilogue(vector<uint32_t>& cmds,
inline void debug_epilogue(std::vector<uint32_t>& cmds,
size_t prior_end) {
if (debug_g) {
// Doing a checksum on the full command length is problematic in the kernel
Expand All @@ -731,7 +731,7 @@ inline void debug_epilogue(vector<uint32_t>& cmds,
}
}

inline void add_dispatcher_cmd(vector<uint32_t>& cmds,
inline void add_dispatcher_cmd(std::vector<uint32_t>& cmds,
CQDispatchCmd cmd,
uint32_t length) {

Expand All @@ -744,7 +744,7 @@ inline void add_dispatcher_cmd(vector<uint32_t>& cmds,
debug_epilogue(cmds, prior_end);
}

inline void add_dispatcher_cmd(vector<uint32_t>& cmds,
inline void add_dispatcher_cmd(std::vector<uint32_t>& cmds,
const CoreRange& workers,
DeviceData& device_data,
CQDispatchCmd cmd,
Expand All @@ -762,7 +762,7 @@ inline void add_dispatcher_cmd(vector<uint32_t>& cmds,
}

inline void add_dispatcher_paged_cmd(Device *device,
vector<uint32_t>& cmds,
std::vector<uint32_t>& cmds,
DeviceData& device_data,
CQDispatchCmd cmd,
uint32_t start_page,
Expand All @@ -775,8 +775,8 @@ inline void add_dispatcher_paged_cmd(Device *device,
}

inline void add_dispatcher_packed_cmd(Device *device,
vector<uint32_t>& cmds,
vector<CoreCoord>& worker_cores,
std::vector<uint32_t>& cmds,
std::vector<CoreCoord>& worker_cores,
DeviceData& device_data,
CQDispatchCmd cmd,
uint32_t size_words,
Expand All @@ -798,7 +798,7 @@ inline void add_dispatcher_packed_cmd(Device *device,

// bare: doesn't generate random payload data, for use w/ eg, dram reads
inline void gen_bare_dispatcher_unicast_write_cmd(Device *device,
vector<uint32_t>& cmds,
std::vector<uint32_t>& cmds,
CoreCoord worker_core,
DeviceData& device_data,
uint32_t length) {
Expand All @@ -821,7 +821,7 @@ inline void gen_bare_dispatcher_unicast_write_cmd(Device *device,
}

inline void gen_dispatcher_unicast_write_cmd(Device *device,
vector<uint32_t>& cmds,
std::vector<uint32_t>& cmds,
CoreCoord worker_core,
DeviceData& device_data,
uint32_t length) {
Expand All @@ -842,7 +842,7 @@ inline void gen_dispatcher_unicast_write_cmd(Device *device,
}

inline void gen_dispatcher_multicast_write_cmd(Device *device,
vector<uint32_t>& cmds,
std::vector<uint32_t>& cmds,
CoreRange worker_core_range,
DeviceData& device_data,
uint32_t length) {
Expand All @@ -868,7 +868,7 @@ inline void gen_dispatcher_multicast_write_cmd(Device *device,
}

inline void gen_dispatcher_paged_write_cmd(Device *device,
vector<uint32_t>& cmds,
std::vector<uint32_t>& cmds,
DeviceData& device_data,
bool is_dram,
uint32_t start_page,
Expand Down Expand Up @@ -913,8 +913,8 @@ inline void gen_dispatcher_paged_write_cmd(Device *device,


inline void gen_dispatcher_packed_write_cmd(Device *device,
vector<uint32_t>& cmds,
vector<CoreCoord>& worker_cores,
std::vector<uint32_t>& cmds,
std::vector<CoreCoord>& worker_cores,
DeviceData& device_data,
uint32_t size_words,
bool repeat = false) {
Expand All @@ -938,7 +938,7 @@ inline void gen_dispatcher_packed_write_cmd(Device *device,
}

inline void gen_rnd_dispatcher_packed_write_cmd(Device *device,
vector<uint32_t>& cmds,
std::vector<uint32_t>& cmds,
DeviceData& device_data) {

// Note: this cmd doesn't clamp to a max size which means it can overflow L1 buffer
Expand All @@ -952,7 +952,7 @@ inline void gen_rnd_dispatcher_packed_write_cmd(Device *device,
if (xfer_size_bytes < min_xfer_size_bytes_g) xfer_size_bytes = min_xfer_size_bytes_g;
}

vector<CoreCoord> gets_data;
std::vector<CoreCoord> gets_data;
while (gets_data.size() == 0) {
for (auto & [core, one_worker] : device_data.get_data()) {
if (device_data.core_and_bank_present(core, 0) &&
Expand Down Expand Up @@ -984,14 +984,14 @@ inline void gen_rnd_dispatcher_packed_write_cmd(Device *device,

inline bool gen_rnd_dispatcher_packed_write_large_cmd(Device *device,
CoreRange workers,
vector<uint32_t>& cmds,
std::vector<uint32_t>& cmds,
DeviceData& device_data,
uint32_t space_available) {

int ntransactions = perf_test_g ? (CQ_DISPATCH_CMD_PACKED_WRITE_LARGE_MAX_SUB_CMDS / 2) :
((std:: rand() % CQ_DISPATCH_CMD_PACKED_WRITE_LARGE_MAX_SUB_CMDS) + 1);

vector<uint32_t> sizes;
std::vector<uint32_t> sizes;
for (int i = 0; i < ntransactions; i++) {
constexpr uint32_t max_pages = 4;
uint32_t xfer_size_16b = (std::rand() % (dispatch_buffer_page_size_g * max_pages / hal.get_alignment(HalMemType::L1))) + 1;
Expand Down Expand Up @@ -1022,7 +1022,7 @@ inline bool gen_rnd_dispatcher_packed_write_large_cmd(Device *device,
cmd.write_packed_large.alignment = hal.get_alignment(HalMemType::L1);
add_bare_dispatcher_cmd(cmds, cmd);

vector<uint32_t> data;
std::vector<uint32_t> data;
for (int i = 0; i < ntransactions; i++) {
uint32_t xfer_size_bytes = sizes[i];

Expand Down Expand Up @@ -1061,7 +1061,7 @@ inline bool gen_rnd_dispatcher_packed_write_large_cmd(Device *device,
return false;
}

inline void gen_dispatcher_host_write_cmd(vector<uint32_t>& cmds,
inline void gen_dispatcher_host_write_cmd(std::vector<uint32_t>& cmds,
DeviceData& device_data,
uint32_t length) {

Expand All @@ -1075,7 +1075,7 @@ inline void gen_dispatcher_host_write_cmd(vector<uint32_t>& cmds,
add_dispatcher_cmd(cmds, device_data.get_host_core(), device_data, cmd, length, false, true);
}

inline void gen_bare_dispatcher_host_write_cmd(vector<uint32_t>& cmds, uint32_t length) {
inline void gen_bare_dispatcher_host_write_cmd(std::vector<uint32_t>& cmds, uint32_t length) {

CQDispatchCmd cmd;
memset(&cmd, 0, sizeof(CQDispatchCmd));
Expand All @@ -1087,7 +1087,7 @@ inline void gen_bare_dispatcher_host_write_cmd(vector<uint32_t>& cmds, uint32_t
add_bare_dispatcher_cmd(cmds, cmd);
}

inline void gen_dispatcher_set_write_offset_cmd(vector<uint32_t>& cmds, uint32_t wo0, uint32_t wo1 = 0, uint32_t wo2 = 0) {
inline void gen_dispatcher_set_write_offset_cmd(std::vector<uint32_t>& cmds, uint32_t wo0, uint32_t wo1 = 0, uint32_t wo2 = 0) {

CQDispatchCmd cmd;
memset(&cmd, 0, sizeof(CQDispatchCmd));
Expand All @@ -1100,7 +1100,7 @@ inline void gen_dispatcher_set_write_offset_cmd(vector<uint32_t>& cmds, uint32_t
add_dispatcher_cmd(cmds, cmd, payload_length);
}

inline void gen_dispatcher_terminate_cmd(vector<uint32_t>& cmds) {
inline void gen_dispatcher_terminate_cmd(std::vector<uint32_t>& cmds) {

CQDispatchCmd cmd;
memset(&cmd, 0, sizeof(CQDispatchCmd));
Expand Down
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