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#0: testing
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@shwetankTT
shwetankTT committed Jan 3, 2025
1 parent ff2073e commit 4c25f2a
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Showing 4 changed files with 124 additions and 23 deletions.
70 changes: 70 additions & 0 deletions tests/ttnn/unit_tests/operations/test_new_conv2d.py
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Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@

import torch
import pytest
import math
from models.utility_functions import (
is_wormhole_b0,
skip_for_grayskull,
Expand Down Expand Up @@ -40,6 +41,29 @@ def _nearest_32(x):
# plt.close()


def write_to_file(file_name, data):
data = data.cpu().numpy()
with open(file_name, "w") as f:
for i in range(1):
for j in range(data.shape[2]):
for k in range(data.shape[3]):
for l in range(data.shape[1]):
f.write(str(data[i][l][j][k]) + " ")
f.write("\n")
f.write("\n")


def write_to_file_special(file_name, data):
data = data.cpu().numpy()
with open(file_name, "w") as f:
for i in range(data.shape[0]):
for j in range(data.shape[1]):
for k in range(data.shape[2]):
for l in range(16):
f.write(str(data[i][j][k][l]) + " ")
f.write("\n")


def run_conv(
device,
math_fidelity,
Expand Down Expand Up @@ -96,6 +120,12 @@ def run_conv(
torch_input_tensor = torch.permute(torch_input_tensor_nchw, (0, 2, 3, 1))
torch_weight_tensor = torch.randn(conv_weight_shape, dtype=torch.bfloat16).float()

# for i in range(output_channels):
# for j in range(input_channels):
# for k in range(filter_height):
# for l in range(filter_height):
# torch_weight_tensor[i, j, k, l] = 1 if i == 0 and j == 0 else 0

torch_bias_tensor = torch.randn(conv_bias_shape, dtype=torch.bfloat16).float() if has_bias else None
torch_out_golden_tensor = torch.nn.functional.conv2d(
torch_input_tensor_nchw,
Expand Down Expand Up @@ -190,6 +220,15 @@ def run_conv(
)

tt_output_tensor = ttnn.from_device(tt_output_tensor_on_device)
tt_output_tensor = ttnn.reshape(
tt_output_tensor,
[
1,
1,
tt_output_tensor.shape[0] * tt_output_tensor.shape[1] * tt_output_tensor.shape[2],
tt_output_tensor.shape[3],
],
)
torch_output_tensor = ttnn.to_torch(tt_output_tensor, mesh_composer=output_mesh_composer)

# torch_output_tensor is in row major layout and NHWC shape
Expand Down Expand Up @@ -335,6 +374,15 @@ def run_conv_with_split(
return_weights_and_bias=True,
)
tt_conv_output_tensor = ttnn.from_device(tt_output_tensor_on_device)
tt_conv_output_tensor = ttnn.reshape(
tt_conv_output_tensor,
[
1,
1,
tt_conv_output_tensor.shape[0] * tt_conv_output_tensor.shape[1] * tt_conv_output_tensor.shape[2],
tt_conv_output_tensor.shape[3],
],
)
torch_conv_output_tensor = ttnn.to_torch(tt_conv_output_tensor)
print(f"Output shape : {batch_size} {out_height} {out_width} {output_channels}")
torch_conv_output_tensor = torch_conv_output_tensor.reshape(batch_size, out_height, out_width, output_channels)
Expand Down Expand Up @@ -676,6 +724,16 @@ def test_conv_ws(
)

tt_output_tensor = ttnn.from_device(tt_output_tensor_on_device)
print(tt_output_tensor.shape)
tt_output_tensor = ttnn.reshape(
tt_output_tensor,
[
1,
1,
tt_output_tensor.shape[0] * tt_output_tensor.shape[1] * tt_output_tensor.shape[2],
tt_output_tensor.shape[3],
],
)
torch_output_tensor = ttnn.to_torch(tt_output_tensor)

# torch_output_tensor is in row major layout and NHWC shape
Expand Down Expand Up @@ -1051,6 +1109,9 @@ def test_conv_mem_config_wh(
if device.core_grid.y == 7:
pytest.skip("Issue #6992: Statically allocated circular buffers in program clash with L1 buffers on core range")

if batch_size == 16:
pytest.skip("Error. Need to discuss this with Infra team")

use_shallow_conv_variant = (input_channels == 16) and device.arch() != ttnn.device.Arch.WORMHOLE_B0
run_conv(
device,
Expand Down Expand Up @@ -2767,6 +2828,15 @@ def test_shallow_conv_with_tiled_input(device):
)

tt_output_tensor = ttnn.from_device(tt_out)
tt_output_tensor = ttnn.reshape(
tt_output_tensor,
[
1,
1,
tt_output_tensor.shape[0] * tt_output_tensor.shape[1] * tt_output_tensor.shape[2],
tt_output_tensor.shape[3],
],
)
torch_output_tensor = ttnn.to_torch(tt_output_tensor)

# torch_output_tensor is in row major layout and NHWC shape
Expand Down
18 changes: 18 additions & 0 deletions tests/ttnn/unit_tests/operations/test_prepare_conv_weights.py
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Original file line number Diff line number Diff line change
Expand Up @@ -187,6 +187,15 @@ def test_prepare_conv_weights(
)

tt_output_tensor = ttnn.from_device(tt_output_tensor_on_device)
tt_output_tensor = ttnn.reshape(
tt_output_tensor,
[
1,
1,
tt_output_tensor.shape[0] * tt_output_tensor.shape[1] * tt_output_tensor.shape[2],
tt_output_tensor.shape[3],
],
)
torch_output_tensor = ttnn.to_torch(tt_output_tensor)
torch_output_tensor = torch_output_tensor[:, :, :, :output_channels]
torch_output_tensor = torch_output_tensor.reshape(torch_out_golden_tensor.shape)
Expand Down Expand Up @@ -316,6 +325,15 @@ def test_prepare_bias(
)

tt_output_tensor = ttnn.from_device(tt_output_tensor_on_device)
tt_output_tensor = ttnn.reshape(
tt_output_tensor,
[
1,
1,
tt_output_tensor.shape[0] * tt_output_tensor.shape[1] * tt_output_tensor.shape[2],
tt_output_tensor.shape[3],
],
)
torch_output_tensor = ttnn.to_torch(tt_output_tensor)

torch_output_tensor = torch_output_tensor[:, :, :, :output_channels]
Expand Down
57 changes: 35 additions & 22 deletions ttnn/cpp/ttnn/operations/conv/conv2d/device/conv2d_op.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -215,24 +215,24 @@ std::vector<TensorSpec> OptimizedConvNew::compute_output_specs(const std::vector
tt::round_up(parallelization_config.per_core_out_matrix_height, TILE_HEIGHT);
auto padded_shape_c = tt::round_up(this->output_channels, TILE_WIDTH);
auto output_padding = Padding(
{{0, 0}, {0, 0}, {0, (padded_shape_w - shape_w)}, {0, (padded_shape_c - shape_c)}}, Padding::PadValue::Zero);
auto output_shape = tt::tt_metal::LegacyShape({1, 1, padded_shape_w, padded_shape_c}, output_padding);
{{0, 0}, {0, 0}, {0, 0}, {0, (padded_shape_c - shape_c)}}, Padding::PadValue::Zero);
auto output_shape = tt::tt_metal::LegacyShape({batch_size, conv_output_h, conv_output_w, padded_shape_c}, output_padding);

auto output_layout = this->untilize_out ? Layout::ROW_MAJOR : Layout::TILE;
if (this->memory_config.is_sharded()) {
if (this->memory_config.memory_layout == TensorMemoryLayout::HEIGHT_SHARDED) {
uint32_t total_height_tiles = tt::tt_metal::compute_volume(output_shape) / output_shape[-1] / TILE_HEIGHT;
uint32_t total_height_tiles = tt::div_up(tt::tt_metal::compute_volume(output_shape) / output_shape[-1], TILE_HEIGHT);
uint32_t num_cores;
std::array<uint32_t, 2> shard_shape;
if (this->use_non_tile_height) {
num_cores = this->parallelization_config.num_cores_nhw;
uint32_t total_height = tt::tt_metal::compute_volume(output_shape) / output_shape[-1];
shard_shape = {(uint32_t)(total_height / num_cores), output_shape[-1]};
} else {
num_cores = total_height_tiles /
tt::div_up(this->parallelization_config.per_core_out_matrix_height, TILE_HEIGHT);
CoreRangeSet shard_grid =
tt::tt_metal::num_cores_to_corerangeset(num_cores, this->parallelization_config.grid_size, true);
std::cout << "num_cores = " << num_cores << " " << total_height << " " << this->parallelization_config.per_core_out_matrix_height << std::endl;
shard_shape = {optimized_conv_op_utils::div_up(total_height, num_cores), output_shape[-1]};
}else{
num_cores = tt::div_up(total_height_tiles, tt::div_up(this->parallelization_config.per_core_out_matrix_height, TILE_HEIGHT));
std::cout << "num_cores = " << num_cores << " " << total_height_tiles << " " << this->parallelization_config.per_core_out_matrix_height << std::endl;
CoreRangeSet shard_grid = tt::tt_metal::num_cores_to_corerangeset(num_cores, this->parallelization_config.grid_size, true);

shard_shape = {
optimized_conv_op_utils::div_up(
Expand All @@ -245,28 +245,41 @@ std::vector<TensorSpec> OptimizedConvNew::compute_output_specs(const std::vector
auto shard_spec = ShardSpec{shard_grid, shard_shape, ShardOrientation::ROW_MAJOR};
auto mem_config = this->memory_config;
mem_config.shard_spec = shard_spec;
return {TensorSpec(
output_shape.logical_shape(),
TensorLayout::fromLegacyPaddedShape(
dtype, PageConfig(output_layout), mem_config, ttnn::Shape(output_shape)))};
} else if (this->memory_config.memory_layout == TensorMemoryLayout::WIDTH_SHARDED) {
std::cout << "output_shape -> " << output_shape << std::endl;
// auto ss = output_shape.without_padding();
// std::cout << "ss = " << ss << std::endl;
SimpleShape output_shape_({output_shape[0], output_shape[1], output_shape[2], output_shape[3]});
std::cout << "output_shape_ = " << output_shape_ << std::endl;
std::cout << "mem_config " << mem_config << "output_layout = " << (int)output_layout << std::endl;
TensorSpec output_spec(output_shape_, TensorLayout(this->dtype, PageConfig(output_layout), mem_config));
return {output_spec};
} else if(this->memory_config.memory_layout == TensorMemoryLayout::WIDTH_SHARDED) {
uint32_t total_height_tiles = tt::tt_metal::compute_volume(output_shape) / output_shape[-1] / TILE_HEIGHT;
std::array<uint32_t, 2> shard_shape = {
tt::div_up(this->parallelization_config.per_core_out_matrix_height, TILE_HEIGHT) * TILE_HEIGHT,
tt::div_up(this->parallelization_config.per_core_out_matrix_width, TILE_WIDTH) * TILE_WIDTH};
auto shard_grid = this->memory_config.shard_spec.value().grid;
auto shard_spec = ShardSpec{shard_grid, shard_shape, this->memory_config.shard_spec.value().orientation};
std::cout << "shard_sape -> " << shard_shape[0] << " " << shard_shape[1] << std::endl;
auto mem_config = this->memory_config;
mem_config.shard_spec = shard_spec;
return {TensorSpec(
output_shape.logical_shape(),
TensorLayout::fromLegacyPaddedShape(
dtype, PageConfig(output_layout), mem_config, ttnn::Shape(output_shape)))};
// auto ss = output_shape.without_padding();
SimpleShape output_shape_({output_shape[0], output_shape[1], output_shape[2], output_shape[3]});
TensorSpec output_spec(output_shape_, TensorLayout(this->dtype, PageConfig(output_layout), mem_config));
std::cout << "output_shape_ = " << output_shape_ << std::endl;
std::cout << "mem_config " << mem_config << "output_layout = " << (int)output_layout << std::endl;
return {output_spec};
//return {create_device_tensor(output_spec, input_tensor.device())};

} else if (this->memory_config.memory_layout == TensorMemoryLayout::BLOCK_SHARDED) {
return {TensorSpec(
output_shape.logical_shape(),
TensorLayout::fromLegacyPaddedShape(
dtype, PageConfig(output_layout), memory_config, ttnn::Shape(output_shape)))};
std::cout << "testing block sharded" << std::endl;
//auto ss = output_shape.without_padding();
SimpleShape output_shape_({output_shape[0], output_shape[1], output_shape[2], output_shape[3]});
TensorSpec output_spec(output_shape_, TensorLayout(this->dtype, PageConfig(output_layout), this->memory_config));
std::cout << "output_shape_ = " << output_shape_ << std::endl;
std::cout << "mem_config " << this->memory_config << "output_layout = " << (int)output_layout << std::endl;
return {output_spec};
//return {create_device_tensor(output_spec, input_tensor.device())};
} else {
TT_THROW("Unsupported shard scheme");
}
Expand Down
2 changes: 1 addition & 1 deletion ttnn/cpp/ttnn/tensor/tensor_impl.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ namespace tt_metal {

namespace tensor_impl {

TensorPrintProfile TTNN_TENSOR_PRINT_PROFILE = TensorPrintProfile::Short;
TensorPrintProfile TTNN_TENSOR_PRINT_PROFILE = TensorPrintProfile::Full;

std::ostream& operator<<(std::ostream& os, const DataType& dtype) {
switch (dtype) {
Expand Down

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