Assorted updates to StRoot/RTS, including "char *" issue (#406)

This updates the StRoot/RTS directories to solve issues with the
conversion between char * and const char *

StRoot/RTS/include/DAQ1000/rb.hh

@@ -67,7 +67,7 @@ public:
 	int emu_fifo_length[128] ;
 	volatile rbFifo_t *sfifo, *rfifo ;	// same for fifos
 
-protected:
+//protected:
 
 	int board ;
 	int ch ;	// also port!

StRoot/RTS/include/fcfClass.hh

@@ -201,7 +201,7 @@ public:
 	int compare(u_int *p1[3], u_int *p2[3]) ;
 
 	void decode(u_int *data, fcfHit *h, u_int *sim = 0) ;	// utility: from FCF to local
-	void print_hit(char *, fcfHit *hit) ;	// utility
+	void print_hit(const char *, fcfHit *hit) ;	// utility
 
 	u_int do_swap ;		// 0=no, 1=yes => set by "burn"
 	u_int do_merge ;	// merge broken rows

StRoot/RTS/include/platform.h

@@ -467,7 +467,7 @@ extern MSG_Q_ID *pMsgQArray;
 inline void pSetupMsgQArray(MSG_Q_ID *qarray) {
   pMsgQArray = qarray;
 
-  LOG(DBG, "pMsgQArray = 0x%x",pMsgQArray,0,0,0,0);
+  LOG(DBG, "pMsgQArray = 0x%x",pMsgQArray,0,0,0,0); 
 }
 #endif
 

StRoot/RTS/include/rtsCfgL0Mask.h

@@ -0,0 +1,27 @@
+#ifndef _RTSCFGL0MASK_H_
+#define _RTSCFGL0MASK_H_
+
+#include <trgConfNum.h>
+#include <rtsSystems.h>
+
+#define MAX_TRG_DETS 20
+
+// Configuration file handling code
+struct TrgDetMask {
+    int id;                        // trigger id
+    char trgname[20];              // trigger name
+    //char name[MAX_CONF_NUM][20];   // crate names
+    UINT32 mask[MAX_CONF_NUM];     // mask
+};
+
+int readDetToTriggerCrateFile(TrgDetMask *masks);
+
+
+
+// The interface for the trigger nodes
+// -1 if error
+int configureTrgDetRequirements(int myConfNum);
+UINT32 getBoardMaskForTrgDet(UINT32 trgDetMask);
+
+
+#endif

StRoot/RTS/include/rtsLog.h

@@ -219,8 +219,8 @@ INLINE_HACK void rtsLogLevel(const char *level)
                 else if((tonkoLogLevel>3) && (*yada == 'E')) ; \
                 else if((tonkoLogLevel>4) && (*yada == 'O')) ; \
                 else { \
-			logMsg("" SEV ": " __FILE__ " [line %d]: " STRING "\n",__LINE__,(unsigned int)A1,(unsigned int)A2,(unsigned int)A3,(unsigned int)A4,(unsigned int)A5) ;\
-			sbLOG("" SEV ": " __FILE__ " [line %d]: " STRING "\n",__LINE__,(unsigned int)A1,(unsigned int)A2,(unsigned int)A3,(unsigned int)A4,(unsigned int)A5) ;\
+		    logMsg((char *)"" SEV ": " __FILE__ " [line %d]: " STRING "\n",__LINE__,(unsigned int)A1,(unsigned int)A2,(unsigned int)A3,(unsigned int)A4,(unsigned int)A5) ; \
+		    sbLOG((char *)"" SEV ": " __FILE__ " [line %d]: " STRING "\n",__LINE__,(unsigned int)A1,(unsigned int)A2,(unsigned int)A3,(unsigned int)A4,(unsigned int)A5) ; \
 		} \
 	} while(0) \
 

StRoot/RTS/include/rtsMonitor.h

@@ -427,7 +427,7 @@ struct rts2011EvbxSuperMon {
     u_int stream;	   // which stream evts sent to
   } trgs[TRIGGERS_MAX+1] ;
 
-  u_int detectorErrors[32];
+  u_int detectorErrors[RTS_NUM_SYSTEMS];
 };
 
 // new, FY13, slow controls monitoring (via scDeamon)

StRoot/RTS/include/rtsSystems.h

@@ -444,6 +444,9 @@ extern inline const char *getTrgDetBitName(int x) {
 #define TRG_EQ1_QTD_INSTANCE 36
 #define TRG_EQ2_QTD_INSTANCE 37
 #define TRG_EQ3_QTD_INSTANCE 38
+#define TRG_EQ4_QTD_INSTANCE 39
+
+#define TRG_EQ4_INSTANCE 40
 
 
 #define L3EVP_INSTANCE      1
@@ -625,6 +628,8 @@ extern inline const char *getTrgDetBitName(int x) {
 #define TRG_EQ3_NODE    ((TRG_SYSTEM<<12) | TRG_EQ3_INSTANCE)     // Rename EPQ > EQ3.  JMN 8/15/17
 #define TRG_EQ1_NODE    ((TRG_SYSTEM<<12) | TRG_EQ1_INSTANCE)     // Rename FQ1 > EQ1.  JMN
 #define TRG_EQ2_NODE    ((TRG_SYSTEM<<12) | TRG_EQ2_INSTANCE)     // Rename FQ2 > EQ2.  JMN
+#define TRG_EQ4_NODE    ((TRG_SYSTEM<<12) | TRG_EQ4_INSTANCE)
+
 #define TRG_STP2_NODE   ((TRG_SYSTEM<<12) | TRG_STP2_INSTANCE)
 #define TRG_L1_DSM2_NODE ((TRG_SYSTEM<<12) | TRG_L1_DSM2_INSTANCE)
 #define TRG_BBC_DSM2_NODE ((TRG_SYSTEM<<12) | TRG_BBC_DSM2_INSTANCE)

StRoot/RTS/src/DAQ_BSMD/bsmdPed.cxx

@@ -339,16 +339,16 @@ int bsmdPed::to_evb(char *buff)
 	return ((char *)dta-buff) ;
 }
 
-int bsmdPed::from_cache(char *fname) 
+int bsmdPed::from_cache(const char *fname) 
 {
 	FILE *f ;
-	char *fn ;
+	const char *fn ;
 
 	init(0x3F) ;	// to clear ped storage for all 6 RDOs
 
 	// trivial load from disk...
 	if(fname) {
-		fn = fname ;
+	        fn = fname ;
 		f = fopen(fname,"r") ;
 	}
 	else {
@@ -391,11 +391,11 @@ int bsmdPed::from_cache(char *fname)
 	return valid ;
 }
 
-int bsmdPed::to_cache(char *fname, u_int run)
+int bsmdPed::to_cache(const char *fname, u_int run)
 {
 	FILE *f ;
 	int r, p, t ;
-	char *fn ;
+	const char *fn ;
 
 
 	if(!valid) {
@@ -404,7 +404,7 @@ int bsmdPed::to_cache(char *fname, u_int run)
 	}
 
 	if(fname) {
-		fn = fname ;
+	        fn = fname ;
 	}
 	else {
 		fn = "/RTScache/pedestals.txt" ;

StRoot/RTS/src/DAQ_BSMD/bsmdPed.h

@@ -26,8 +26,8 @@ class bsmdPed {
 	int do_zs(char *src, int in_bytes, char *dst, int rdo1, u_int *adc_sum=0) ;
 	int to_evb(char *buff) ;			// to EVB format from ped_store
 
-	int from_cache(char *fname = 0) ;		// from cached file to ped_store
-	int to_cache(char *fname = 0, u_int run = 0) ;			// to cached file from ped_store
+	int from_cache(const char *fname = 0) ;		// from cached file to ped_store
+	int to_cache(const char *fname = 0, u_int run = 0) ;			// to cached file from ped_store
 
 	int special_setup(int run_type, int sub_type) ;
 

StRoot/RTS/src/DAQ_BSMD/daq_bsmd.cxx

@@ -352,7 +352,7 @@ daq_dta *daq_bsmd::handle_ped_rms(int rdo, int is_ped)
 			full_name = caller->get_sfs_name(str) ;
 
 			if(!full_name) continue ;
-
+			
 			l_bytes = caller->sfs->fileSize(full_name) ;
 
 			bytes += l_bytes ;

StRoot/RTS/src/DAQ_BTOW/daq_btow.cxx

@@ -136,7 +136,7 @@ daq_dta *daq_btow::handle_raw()
 	char *from, *st ;
 	int bytes ;
 	char str[256] ;	
-	char *full_name = "?" ;	// just a dummy...
+	const char *full_name = "?" ;	// just a dummy...
 
 	from = 0 ;
 	full_name = "?" ;
@@ -168,7 +168,7 @@ daq_dta *daq_btow::handle_raw()
 	st = (char *) raw->request(bytes) ;
 
 	if(present & DET_PRESENT_SFS) {	// from SFS...
-		int ret = caller->sfs->read(full_name, st, bytes) ;
+	        int ret = caller->sfs->read(full_name, st, bytes) ;
 		if(ret != bytes) {
 			LOG(ERR,"ret is %d") ;
 		}

StRoot/RTS/src/DAQ_EMC/Makefile

@@ -47,10 +47,9 @@ emc_reader.o: ../../../../StRoot/RTS/include/rtsSystems.h
 emc_reader.o: ../../../../StRoot/RTS/include/rts.h
 emc_reader.o: ../../../../StRoot/RTS/include/daqFormats.h
 emc_reader.o: ../../../../StRoot/RTS/include/SECTOR/sector.h
-emc_reader.o: ../../trg/include/trgDataDefs_47.h
+emc_reader.o: ../../trg/include/trgStructures_32.h
 emc_reader.o: ../../../../StRoot/RTS/include/L3/L3Formats.h
 emc_reader.o: ../../trg/include/trgStructures.h
-emc_reader.o: ../../trg/include/trgStructures_32.h
 emc_reader.o: daq_emc.h
 emc_reader.o: ../DAQ_READER/daq_det.h
 emcReader.o: ../DAQ_READER/daqReader.h
@@ -65,7 +64,7 @@ emc_single_reader.o: ../../../../StRoot/RTS/include/rtsLog.h
 emc_single_reader.o: ../../../../StRoot/RTS/include/rtsSystems.h
 emc_single_reader.o: ../../../../StRoot/RTS/include/daqFormats.h
 emc_single_reader.o: ../../../../StRoot/RTS/include/SECTOR/sector.h
-emc_single_reader.o: ../../trg/include/trgDataDefs_47.h
+emc_single_reader.o: ../../trg/include/trgStructures_32.h
 emc_single_reader.o: ../../../../StRoot/RTS/include/L3/L3Formats.h
 emc_single_reader.o: ../../../../StRoot/RTS/include/rts.h
 emc_single_reader.o: ../DAQ_READER/daq_det.h

StRoot/RTS/src/DAQ_EMC/emc_reader.cxx

@@ -62,11 +62,11 @@ static char *inst2char(int inst)
 static struct emc_describe_t {
 	int id ;
 
-	char *p ;
-	char *secp ;
-	char *rbp ;
-	char *adcr ;
-	char *adcd ;	
+	const char *p ;
+	const char *secp ;
+	const char *rbp ;
+	const char *adcr ;
+	const char *adcd ;	
 	int trg_index ;
 	int type ;	// 0 Barrel, 1 Endcap
 	int sub ;	// 0 tower, 1 SMD

StRoot/RTS/src/DAQ_EMC/emc_single_reader.cxx

@@ -8,10 +8,10 @@
 #include <DAQ_READER/daq_det.h>
 
 const struct hdrs {
-	char *emcp ;
-	char *secp ;
-	char *rbp ;
-	char *adc ;
+        const char *emcp ;
+	const char *secp ;
+	const char *rbp ;
+	const char *adc ;
 } hdrs[2] = {
 	{ CHAR_EMCP, CHAR_EMCSECP, CHAR_EMCRBP, CHAR_EMCADCR },
 	{ CHAR_EECP, CHAR_EECSECP, CHAR_EECRBP, CHAR_EECADCR }

StRoot/RTS/src/DAQ_FCS/fcs_data_c.cxx

@@ -39,6 +39,7 @@ u_int fcs_data_c::run_type ;
 
 // for ZS
 float fcs_data_c::n_sigma ;
+float fcs_data_c::n_sigma_epd ;
 short fcs_data_c::n_pre ;
 short fcs_data_c::n_post ;
 short fcs_data_c::n_cou ;
@@ -263,6 +264,10 @@ int fcs_data_c::zs_start(u_short *buff)
 	int l_pre, l_post ;
 	int is_trg = 0 ;
 	int i_ped ;
+	float sigma ;
+
+	if(hdr_det==2) sigma = n_sigma_epd ;
+	else sigma = n_sigma ;
 
 	// trigger channels are special so figure this out
 	if(ch >= 32) is_trg = 1 ;
@@ -281,16 +286,16 @@ int fcs_data_c::zs_start(u_short *buff)
 		LOG(DBG,"S%d:%d:%d mean %f, n_sigma %f, rms %f",
 		    sector,rdo,ch,
 		    (float)ped[sector-1][rdo-1].mean[ch],
-		    (float)n_sigma,
+		    (float)sigma,
 		    (float)ped[sector-1][rdo-1].rms[ch]) ;
 
 		// I don't think that a threshold as a function of RMS is a good idea.
 		// I should do what the ASICs do and have a fixed digital threshold
 		if(n_mode==0) {
-			thr = (int)(ped[sector-1][rdo-1].mean[ch] + n_sigma * ped[sector-1][rdo-1].rms[ch] + 0.5) ;
+			thr = (int)(ped[sector-1][rdo-1].mean[ch] + sigma * ped[sector-1][rdo-1].rms[ch] + 0.5) ;
 		}
 		else {
-			thr = (int)(ped[sector-1][rdo-1].mean[ch] + n_sigma) ;
+			thr = (int)(ped[sector-1][rdo-1].mean[ch] + sigma) ;
 		}
 
 		l_cou = n_cou ;

StRoot/RTS/src/DAQ_FCS/fcs_data_c.h

@@ -36,6 +36,7 @@ class fcs_data_c {
 		run_number = 0 ;
 
 		n_sigma = 4.0 ;
+		n_sigma_epd = 4.0 ;
 		n_pre = 8 ;
 		n_post = 8 ;
 		n_cou = 4 ;
@@ -233,6 +234,7 @@ class fcs_data_c {
 
 	// for ZS
 	static float n_sigma ;
+	static float n_sigma_epd ;
 	static short n_pre ;
 	static short n_post ;
 	static short n_cou ;

StRoot/RTS/src/DAQ_FGT/fstPed.cxx

@@ -1214,6 +1214,67 @@ int fstPed::to_cache(char *fname, u_int run, int dont_cache)
 
 	fclose(f) ;	
 
+	if(fname) {
+		strcpy(f_fname,fname) ;
+	}
+	else {
+		sprintf(f_fname,"/RTScache/fst_s%d_pedestals_cmn_%08u_%s.txt",sector,run,bad?"BAD":"GOOD") ;
+	}
+
+
+	f = fopen(f_fname,"w") ;
+	if(f==0) {
+		LOG(ERR,"ped::to_cache can't open output file \"%s\" [%s]",f_fname,strerror(errno)) ;
+		return -1 ;
+	}
+
+
+	if(tb_cou_ped != tb_cou_xpect) {
+		LOG(ERR,"Writing pedestals to cache \"%s\" [valid %d] but data has %d timebins != expect %d!",f_fname,valid,
+		    tb_cou_ped,tb_cou_xpect) ;
+	}
+	else {
+		LOG(INFO,"Writing pedestals to cache \"%s\" [valid %d], ntimebins %d",f_fname,valid,tb_cou_ped) ;
+	}
+
+	tim = time(0) ;
+	fprintf(f,"# Detector FST%d\n",sector) ;
+	fprintf(f,"# Run %08u\n",run) ;
+	fprintf(f,"# Date %s",ctime(&tim)) ;
+	fprintf(f,"# Timebins %d\n",tb_cou_ped) ;
+	fprintf(f,"\n") ;
+
+
+	for(int r=0;r<FGT_RDO_COU;r++) {
+		if(rb_mask & (1<<r)) ;
+		else continue ;
+
+
+		struct peds_t *ped = peds + r ;
+
+		for(int arm=0;arm<3;arm++) {
+		for(int apv=0;apv<FGT_APV_COU;apv++) {
+		for(int c=0;c<FGT_CH_COU;c++) {
+
+			// dump only the ones which need to exist!
+			if(ch_status[r][arm][apv][c] & FGT_CH_STAT_SHOULD) ;
+			else continue ;
+
+			if(cmnGroup[apv][c]<0) continue ;
+
+			for(int t=0;t<tb_cou_ped;t++) {
+
+				fprintf(f,"%d %d %2d %3d %2d %7.3f %.3f\n",r+1,arm,apv,c,t,
+					ped->cmn_ped[arm][apv][c][t],
+					ped->cmn_rms[arm][apv][c][t]) ;
+			}
+		}
+		}
+		}
+	}
+
+	fclose(f) ;	
+
 
 
 

StRoot/RTS/src/DAQ_ITPC/daq_itpc.cxx

@@ -258,6 +258,9 @@ daq_dta *daq_itpc::handle_cld_sim(int sec)
 		memset(track_array,0,sizeof(track_array)) ;
 
 		for(u_int i=0;i<sim->ncontent;i++) {
+			// new in Jun 2022
+			if(sim_dta[i].adc==0) sim_dta[i].adc = 0xFFFF ;	// transliterate 0's to 0xFFFF ;
+
 			sim_array[sim_dta[i].tb] = sim_dta[i].adc ;
 			track_array[sim_dta[i].tb] = sim_dta[i].track_id ;
 

StRoot/RTS/src/DAQ_ITPC/itpcCore.cxx

@@ -65,7 +65,7 @@ void itpc_rowpad_to_rdo(int row, int pad, int &rdo)
 	}
 	else return ifee_to_irdo_map[fee_id] ;
 }
-#endif ;
+#endif 
 
 void itpc_rowpad_to_ifee(int row, int pad, int &fee_id, int &fee_ch)
 {