PCell submission from the team SaltyChip of Chipathon2024

[tsengs0]

Contributor: Team SaltyChip, Chipathon 2024

Design intent: Capacitor DAC for 6-bit SAR A/D Converter
Component (pcell): transmission gate and 6-bit MIM capacitor array

• Overall picture that we manage to implement

• Schematic of the transmission gate used for building the CDAC switch for each bit DAC's charge/discharge

[msaligane]

It seems there are two different projects here? are you guys in the same team?
We only need your notebook (no sch. file etc...)

[tsengs0]

We only submit one notebook in this folder ISSCC25/submitted_notebooks/SaltyChip, which contains the layout of transmission gate and 6-bit MIM capacitor array.

However, we haven't integrated them into a 6-bit capacitor DAC yet, so in sar_ad_frontend_cdac.ipynb, the source codes for building the transmission gate and MIM capacitor array are presented separately.

[msaligane]

If you check your files, you ll find a micronina folder. Can you review the files you are pushing?

[msaligane]

@tsengs0 Please review asap. Thanks!

[tsengs0]

I'm sorry for not getting back to you sooner. I pushed the other Team's contribution "MicroNina" by a mistake.
I have deleted it from our commit and pushed it again.

I would like to ask for your review again. The content of our latest push is as follows:

./ISSCC25/
└── submitted_notebooks
    └── SaltyChip
        └── sar_ad_frontend_cdac.ipynb