[*] Add CFG_DMI_TAP_ID config parameter into river_cfg

sergeykhbr · Nov 25, 2023 · 01022bb · 01022bb
1 parent 77547ee
commit 01022bb
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Showing 7 changed files with 32 additions and 22 deletions.
diff --git a/sc/rtl/riverlib/dmi/dmidebug.cpp b/sc/rtl/riverlib/dmi/dmidebug.cpp
@@ -57,9 +57,9 @@ dmidebug::dmidebug(sc_module_name name,
     cdc = 0;
     tap = 0;
 
-    tap = new jtagtap<0x10e31913,
-                      7,
-                      5>("tap");
+    tap = new jtagtap<7,
+                      5>("tap",
+                         CFG_DMI_TAP_ID);
     tap->i_trst(i_trst);
     tap->i_tck(i_tck);
     tap->i_tms(i_tms);

diff --git a/sc/rtl/riverlib/dmi/dmidebug.h b/sc/rtl/riverlib/dmi/dmidebug.h
@@ -198,7 +198,7 @@ SC_MODULE(dmidebug) {
     sc_signal<bool> w_jtag_dmi_error;
 
     jtagcdc *cdc;
-    jtagtap<0x10e31913, 7, 5> *tap;
+    jtagtap<7, 5> *tap;
 
 };
 

diff --git a/sc/rtl/riverlib/dmi/jtagtap.h b/sc/rtl/riverlib/dmi/jtagtap.h
@@ -20,8 +20,7 @@
 
 namespace debugger {
 
-template<uint32_t idcode = 0x10e31913,
-         int abits = 7,
+template<int abits = 7,
          int irlen = 5>
 SC_MODULE(jtagtap) {
  public:
@@ -45,11 +44,14 @@ SC_MODULE(jtagtap) {
 
     SC_HAS_PROCESS(jtagtap);
 
-    jtagtap(sc_module_name name);
+    jtagtap(sc_module_name name,
+            sc_uint<32> idcode);
 
     void generateVCD(sc_trace_file *i_vcd, sc_trace_file *o_vcd);
 
  private:
+    sc_uint<32> idcode_;
+
     static const int drlen = ((abits + 32) + 2);
 
     static const uint8_t IR_IDCODE = 0x01;
@@ -116,8 +118,9 @@ SC_MODULE(jtagtap) {
 
 };
 
-template<uint32_t idcode, int abits, int irlen>
-jtagtap<idcode, abits, irlen>::jtagtap(sc_module_name name)
+template<int abits, int irlen>
+jtagtap<abits, irlen>::jtagtap(sc_module_name name,
+                               sc_uint<32> idcode)
     : sc_module(name),
     i_trst("i_trst"),
     i_tck("i_tck"),
@@ -133,6 +136,7 @@ jtagtap<idcode, abits, irlen>::jtagtap(sc_module_name name)
     i_dmi_error("i_dmi_error"),
     o_dmi_hardreset("o_dmi_hardreset") {
 
+    idcode_ = idcode;
 
     SC_METHOD(comb);
     sensitive << i_trst;
@@ -161,8 +165,8 @@ jtagtap<idcode, abits, irlen>::jtagtap(sc_module_name name)
     sensitive << i_tck.neg();
 }
 
-template<uint32_t idcode, int abits, int irlen>
-void jtagtap<idcode, abits, irlen>::generateVCD(sc_trace_file *i_vcd, sc_trace_file *o_vcd) {
+template<int abits, int irlen>
+void jtagtap<abits, irlen>::generateVCD(sc_trace_file *i_vcd, sc_trace_file *o_vcd) {
     std::string pn(name());
     if (o_vcd) {
         sc_trace(o_vcd, i_trst, i_trst.name());
@@ -191,8 +195,8 @@ void jtagtap<idcode, abits, irlen>::generateVCD(sc_trace_file *i_vcd, sc_trace_f
 
 }
 
-template<uint32_t idcode, int abits, int irlen>
-void jtagtap<idcode, abits, irlen>::comb() {
+template<int abits, int irlen>
+void jtagtap<abits, irlen>::comb() {
     sc_uint<drlen> vb_dr;
     bool v_dmi_req_valid;
     bool v_dmi_req_write;
@@ -245,7 +249,7 @@ void jtagtap<idcode, abits, irlen>::comb() {
             v.state = SHIFT_DR;
         }
         if (nr.ir.read() == IR_IDCODE) {
-            vb_dr = idcode;
+            vb_dr = idcode_;
             v.dr_length = 32;
         } else if (nr.ir.read() == IR_DTMCONTROL) {
             vb_dr(31, 0) = 0;
@@ -402,17 +406,17 @@ void jtagtap<idcode, abits, irlen>::comb() {
     o_dmi_hardreset = v_dmi_hardreset;
 }
 
-template<uint32_t idcode, int abits, int irlen>
-void jtagtap<idcode, abits, irlen>::registers() {
+template<int abits, int irlen>
+void jtagtap<abits, irlen>::registers() {
     if (i_trst.read() == 1) {
         jtagtap_r_reset(r);
     } else {
         r = v;
     }
 }
 
-template<uint32_t idcode, int abits, int irlen>
-void jtagtap<idcode, abits, irlen>::nregisters() {
+template<int abits, int irlen>
+void jtagtap<abits, irlen>::nregisters() {
     if (i_trst.read() == 1) {
         jtagtap_nr_reset(nr);
     } else {

diff --git a/sc/rtl/riverlib/river_cfg.h b/sc/rtl/riverlib/river_cfg.h
@@ -55,6 +55,9 @@ static const int CFG_BP_DEPTH = 5;
 // 
 static const int CFG_DEC_DEPTH = (CFG_BP_DEPTH - 3);        // requested, fetching, fetched
 
+// Jtag TAP ID, contains device and manufacturer values
+static const uint32_t CFG_DMI_TAP_ID = 0x10e31913;
+
 // Valid size 0..16
 static const int CFG_PROGBUF_REG_TOTAL = 16;
 // Must be at least 2 to support RV64I

diff --git a/sv/rtl/riverlib/dmi/dmidebug.sv b/sv/rtl/riverlib/dmi/dmidebug.sv
@@ -77,9 +77,9 @@ logic w_jtag_dmi_error;
 dmidebug_registers r, rin;
 
 jtagtap #(
-    .idcode(32'h10e31913),
     .abits(7),
-    .irlen(5)
+    .irlen(5),
+    .idcode(CFG_DMI_TAP_ID)
 ) tap (
     .i_trst(i_trst),
     .i_tck(i_tck),

diff --git a/sv/rtl/riverlib/dmi/jtagtap.sv b/sv/rtl/riverlib/dmi/jtagtap.sv
@@ -17,9 +17,9 @@
 `timescale 1ns/10ps
 
 module jtagtap #(
-    parameter logic [31:0] idcode = 32'h10e31913,
     parameter int abits = 7,
-    parameter int irlen = 5
+    parameter int irlen = 5,
+    parameter logic [31:0] idcode = 32'h10e31913
 )
 (
     input logic i_trst,                                     // Must be open-train, pullup

diff --git a/sv/rtl/riverlib/river_cfg_pkg.sv b/sv/rtl/riverlib/river_cfg_pkg.sv
@@ -52,6 +52,9 @@ localparam int CFG_BP_DEPTH = 5;
 // 
 localparam int CFG_DEC_DEPTH = (CFG_BP_DEPTH - 3);          // requested, fetching, fetched
 
+// Jtag TAP ID, contains device and manufacturer values
+localparam bit [31:0] CFG_DMI_TAP_ID = 32'h10e31913;
+
 // Valid size 0..16
 localparam int CFG_PROGBUF_REG_TOTAL = 16;
 // Must be at least 2 to support RV64I