Improved page mapping benchmarks #39
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apps/page_mapping/src/main.c
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| ZF_LOGF_IFERR(err, "ummap page table\n"); | ||
| } | ||
| } | ||
| #else |
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better make this more specific
#elif defined(CONFIG_ARCH_AARCH64)
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I believe this should be the behaviour for ia32 as well, I suppose I can do an elif with both though.
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So it could be this:
| #else | |
| #ifdef CONFIG_ARCH_X86_64 | |
| err = seL4_X86_PDPT_Unmap(i); | |
| if (!err) { continue; } | |
| err = seL4_X86_PageDirectory_Unmap(i); | |
| if (!err) { continue; } | |
| #endif /* CONFIG_ARCH_X86_64 */ | |
| err = seL4_ARCH_PageTable_Unmap(i); | |
| ZF_LOGF_IFERR(err, "ummap page table\n"); |
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That would work, though I'm not sure it helps much in terms of clarity.
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apps/page_mapping/CMakeLists.txt
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| @@ -16,7 +16,7 @@ config_option( | |||
| DEFAULT | |||
| ON | |||
| DEPENDS | |||
| "DefaultBenchDeps" | |||
| "DefaultBenchDeps; KernelSel4ArchAarch64 OR KernelArchX86" | |||
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Yeah, I was thinking that too. Since RISC-V uses pretty much the same kind of page table structure as AARCH64, it would probably work with these changes. Do you think that's worth adding to this PR?
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I you have the time to check RISC-V also, that would be good. Seems we are just excluding arm32 then.
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Finally had some time to revisit this, I have confirmed the benchmarks work on RISC-V (though I haven't run the full benchmark with up to 2048 pages and 16 runs per configuration to completion as it takes forever).
Extended page mapping benchmarks to work on AARCH64, changed CMake to make it clearer which architectures are supported, and fixed a bug in the implementation. Signed-off-by: Alwin Joshy <[email protected]>
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This commit enables page-mapping benchmarks for RISC-V. No changes were needed due to the changes to AARCH64 page table structures, which made each level of the page table a generic PageTable object (which was already the case in RISC-V). Signed-off-by: Alwin Joshy <[email protected]>
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The existing page mapping benchmarks only appear to be implemented for x86 platforms. In this PR, I have extended the benchmarks to work on AARCH64 and fixed a bug with the protect benchmark, which would result in the same page being protected repeatedly instead of protection being applied to all of the pages in the range. I have also modified the CMake to be more explicit that this benchmark is currently only supported on x86 and AARCH64.
Because of the changes to vspace mapping in seL4/seL4#801, the logic for preparing the page tables is quite different on AARCH64 compared to x86_64, which retains the design of unique kernel objects for each level of the page table. Because it is not obvious if a page table mapping succeeding means that the lowest level page table required for mapping a small page exists, I repeatedly map page tables for an address until the mapping operation fails with
seL4_DeleteFirst, indicating that the page table has already been completely filled in for this address. Not sure if this is the ideal way of doing this and I can change it to do something else if not.