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Merge patch-axel-7
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Axel Heider committed Apr 18, 2024
2 parents c9fd187 + 0a5df8e commit 8086aa4
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Showing 7 changed files with 33 additions and 22 deletions.
8 changes: 5 additions & 3 deletions .github/workflows/sel4bench-pr.yml
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Expand Up @@ -44,16 +44,18 @@ jobs:
fail-fast: false
matrix:
march: [armv7a, armv8a, nehalem, rv64imac]
compiler: [gcc, clang]
steps:
- name: Build
uses: axel-h/ci-actions/sel4bench@patch-axel-16
with:
xml: ${{ needs.code.outputs.xml }}
march: ${{ matrix.march }}
compiler: ${{ matrix.compiler }}
- name: Upload images
uses: actions/upload-artifact@v4
with:
name: images-${{ matrix.march }}
name: images-${{ matrix.march }}-${{matrix.compiler}}
path: '*-images.tar.gz'

hw-run:
Expand Down Expand Up @@ -100,7 +102,7 @@ jobs:
- name: Download image
uses: actions/download-artifact@v4
with:
name: images-${{ steps.plat.outputs.march }}
name: images-${{ steps.plat.outputs.march }}-${{matrix.compiler}}
- name: Run
uses: axel-h/ci-actions/sel4bench-hw@patch-axel-16
with:
Expand All @@ -113,5 +115,5 @@ jobs:
uses: actions/upload-artifact@v4
with:
# funky expression below is to work around lack of ternary operator
name: sel4bench-results-${{ matrix.platform }}${{ matrix.req != '' && format('-{0}', matrix.req) || '' }}
name: sel4bench-results-${{ matrix.platform }}${{ matrix.req != '' && format('-{0}', matrix.req) || '' }}-${{matrix.compiler}}
path: '*.json'
18 changes: 10 additions & 8 deletions .github/workflows/sel4bench.yml
Original file line number Diff line number Diff line change
Expand Up @@ -40,16 +40,18 @@ jobs:
fail-fast: false
matrix:
march: [armv7a, armv8a, nehalem, rv64imac]
compiler: [gcc, clang]
steps:
- name: Build
uses: axel-h/ci-actions/sel4bench@patch-axel-16
with:
xml: ${{ needs.code.outputs.xml }}
march: ${{ matrix.march }}
compiler: ${{ matrix.compiler }}
- name: Upload images
uses: actions/upload-artifact@v4
with:
name: images-${{ matrix.march }}
name: images-${{ matrix.march }}-${{matrix.compiler}}
path: '*-images.tar.gz'

hw-run:
Expand Down Expand Up @@ -90,7 +92,7 @@ jobs:
- name: Download image
uses: actions/download-artifact@v4
with:
name: images-${{ steps.plat.outputs.march }}
name: images-${{ steps.plat.outputs.march }}-${{matrix.compiler}}
- name: Run
uses: axel-h/ci-actions/sel4bench-hw@patch-axel-16
with:
Expand All @@ -103,7 +105,7 @@ jobs:
uses: actions/upload-artifact@v4
with:
# funky expression below is to work around lack of ternary operator
name: sel4bench-results-${{ matrix.platform }}${{ matrix.req != '' && format('-{0}', matrix.req) || '' }}
name: sel4bench-results-${{ matrix.platform }}${{ matrix.req != '' && format('-{0}', matrix.req) || '' }}-${{matrix.compiler}}
path: '*.json'

deploy:
Expand All @@ -128,23 +130,23 @@ jobs:
- name: Get results for web deployment (sabre)
uses: actions/download-artifact@v4
with:
name: sel4bench-results-sabre
name: sel4bench-results-sabre-gcc
- name: Get results for web deployment (haswell)
uses: actions/download-artifact@v4
with:
name: sel4bench-results-pc99-haswell3
name: sel4bench-results-pc99-haswell3-gcc
- name: Get results for web deployment (skylake)
uses: actions/download-artifact@v4
with:
name: sel4bench-results-pc99-skylake
name: sel4bench-results-pc99-skylake-gcc
- name: Get results for web deployment (tx1)
uses: actions/download-artifact@v4
with:
name: sel4bench-results-tx1
name: sel4bench-results-tx1-gcc
- name: Get results for web deployment (hifive)
uses: actions/download-artifact@v4
with:
name: sel4bench-results-hifive
name: sel4bench-results-hifive-gcc
- name: Generate web page
uses: axel-h/ci-actions/sel4bench-web@patch-axel-16
with:
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Original file line number Diff line number Diff line change
Expand Up @@ -38,5 +38,5 @@
} while(0)
#endif /* CONFIG_KERNEL_MCS */

#define DO_REAL_REPLY_RECV_1(ep, mr0, ro) DO_REPLY_RECV_1(ep, mr0, ro, "swi $0")
#define DO_REAL_REPLY_RECV_1(ep, mr0, ro) DO_REPLY_RECV_1(ep, mr0, ro, "swi #0")
#define DO_NOP_REPLY_RECV_1(ep, mr0, ro) DO_REPLY_RECV_1(ep, mr0, ro, "nop")
Original file line number Diff line number Diff line change
Expand Up @@ -14,5 +14,5 @@
); \
} while (0);

#define DO_REAL_NULLSYSCALL() DO_NULLSYSCALL("swi $0")
#define DO_REAL_NULLSYSCALL() DO_NULLSYSCALL("swi #0")
#define DO_NOP_NULLSYSCALL() DO_NULLSYSCALL("nop")
12 changes: 6 additions & 6 deletions libsel4benchsupport/sel4_arch_include/aarch32/sel4_arch/ipc.h
Original file line number Diff line number Diff line change
Expand Up @@ -106,16 +106,16 @@
} while(0)
#endif /* CONFIG_KERNEL_MCS */

#define DO_REAL_CALL(ep, tag) DO_CALL(ep, tag, "swi $0")
#define DO_REAL_CALL(ep, tag) DO_CALL(ep, tag, "swi #0")
#define DO_NOP_CALL(ep, tag) DO_CALL(ep, tag, "nop")
#define DO_REAL_CALL_10(ep, tag) DO_CALL_10(ep, tag, "swi $0")
#define DO_REAL_CALL_10(ep, tag) DO_CALL_10(ep, tag, "swi #0")
#define DO_NOP_CALL_10(ep, tag) DO_CALL_10(ep, tag, "nop")
#define DO_REAL_SEND(ep, tag) DO_SEND(ep, tag, "swi $0")
#define DO_REAL_SEND(ep, tag) DO_SEND(ep, tag, "swi #0")
#define DO_NOP_SEND(ep, tag) DO_SEND(ep, tag, "nop")

#define DO_REAL_REPLY_RECV(ep, tag, ro) DO_REPLY_RECV(ep, tag, ro, "swi $0")
#define DO_REAL_REPLY_RECV(ep, tag, ro) DO_REPLY_RECV(ep, tag, ro, "swi #0")
#define DO_NOP_REPLY_RECV(ep, tag, ro) DO_REPLY_RECV(ep, tag, ro, "nop")
#define DO_REAL_REPLY_RECV_10(ep, tag, ro) DO_REPLY_RECV_10(ep, tag, ro, "swi $0")
#define DO_REAL_REPLY_RECV_10(ep, tag, ro) DO_REPLY_RECV_10(ep, tag, ro, "swi #0")
#define DO_NOP_REPLY_RECV_10(ep, tag, ro) DO_REPLY_RECV_10(ep, tag, ro, "nop")
#define DO_REAL_RECV(ep, ro) DO_RECV(ep, ro, "swi $0")
#define DO_REAL_RECV(ep, ro) DO_RECV(ep, ro, "swi #0")
#define DO_NOP_RECV(ep, ro) DO_RECV(ep, ro, "nop")
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@
#endif
#define DO_SIGNAL(ntfn, swi) DO_NTFN_OP(ntfn, swi, seL4_SysSend)

#define DO_REAL_WAIT(ntfn) DO_WAIT(ntfn, "swi $0")
#define DO_REAL_WAIT(ntfn) DO_WAIT(ntfn, "swi #0")
#define DO_NOP_WAIT(ntfn) DO_WAIT(ntfn, "nop")
#define DO_REAL_SIGNAL(ntfn) DO_SIGNAL(ntfn, "swi $0")
#define DO_REAL_SIGNAL(ntfn) DO_SIGNAL(ntfn, "swi #0")
#define DO_NOP_SIGNAL(ntfn) DO_SIGNAL(ntfn, "nop")
9 changes: 8 additions & 1 deletion settings.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,14 @@ if(NOT Sel4benchAllowSettingsOverride)
# This option is controlled by ApplyCommonReleaseVerificationSettings
mark_as_advanced(CMAKE_BUILD_TYPE)
if(RELEASE)
if(NOT KernelArchRiscV)
# Known issues with KernelFWholeProgram ('-fwhole-program'):
# - the RISC-V kernel build with gcc currently fails due to a missing
# compiler runtime helper function.
# - this option is not supposed by 'clang' at all. Note that we can't
# check CMAKE_C_COMPILER_ID here, because it is empty, as this file
# might get processed before CMake does any compiler evaluation. Thus,
# the only option is checking if TRIPLE is set or not.
if((NOT KernelArchRiscV) AND (TRIPLE STREQUAL ""))
set(KernelFWholeProgram ON CACHE BOOL "" FORCE)
endif()
endif()
Expand Down

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