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Feat/#482 unify signed bit extraction #515

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merged 5 commits into from
Nov 1, 2024

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KimiWu123
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To close #482

@KimiWu123 KimiWu123 force-pushed the feat/#482-unify-signed-bit-extraction branch from abcc630 to 2a68019 Compare November 1, 2024 02:11
@KimiWu123 KimiWu123 requested a review from hero78119 November 1, 2024 02:24
@KimiWu123 KimiWu123 force-pushed the feat/#482-unify-signed-bit-extraction branch from 2a68019 to 7990a10 Compare November 1, 2024 03:04
@KimiWu123 KimiWu123 marked this pull request as draft November 1, 2024 03:10
@KimiWu123 KimiWu123 marked this pull request as ready for review November 1, 2024 03:21
let is_lhs_neg =
SignedExtendConfig::construct_limb(cb, lhs.limbs.iter().last().unwrap().expr())?;
let is_rhs_neg =
SignedExtendConfig::construct_limb(cb, rhs.limbs.iter().last().unwrap().expr())?;
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As far as I can tell, every single time you use SignedExtendConfig::construct_limb you do .limbs.iter().last().unwrap().expr()). Perhaps just make a helper function that does this for you?

(That's more or less exactly what the motivation behind my is_negative was.)

@KimiWu123 KimiWu123 force-pushed the feat/#482-unify-signed-bit-extraction branch from a367ca0 to 652ac42 Compare November 1, 2024 03:33
let lhs_value = Value::new_unchecked(lhs as Word);
let rhs_value = Value::new_unchecked(rhs as Word);
self.is_lhs_neg.assign_instance(
self.is_lhs_neg.assign_instance::<E>(
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You can let the Rust compiler handle the type inference here:

diff --git a/ceno_zkvm/src/gadgets/is_lt.rs b/ceno_zkvm/src/gadgets/is_lt.rs
index 1dd11659..12da88cd 100644
--- a/ceno_zkvm/src/gadgets/is_lt.rs
+++ b/ceno_zkvm/src/gadgets/is_lt.rs
@@ -368,12 +368,12 @@ impl InnerSignedLtConfig {
     ) -> Result<(), ZKVMError> {
         let lhs_value = Value::new_unchecked(lhs as Word);
         let rhs_value = Value::new_unchecked(rhs as Word);
-        self.is_lhs_neg.assign_instance::<E>(
+        self.is_lhs_neg.assign_instance(
             instance,
             lkm,
             *lhs_value.as_u16_limbs().last().unwrap() as u64,
         )?;
-        self.is_rhs_neg.assign_instance::<E>(
+        self.is_rhs_neg.assign_instance(
             instance,
             lkm,
             *rhs_value.as_u16_limbs().last().unwrap() as u64,
diff --git a/ceno_zkvm/src/gadgets/signed_ext.rs b/ceno_zkvm/src/gadgets/signed_ext.rs
index 162a2745..1252532c 100644
--- a/ceno_zkvm/src/gadgets/signed_ext.rs
+++ b/ceno_zkvm/src/gadgets/signed_ext.rs
@@ -6,6 +6,7 @@ use crate::{
     set_val,
     witness::LkMultiplicity,
 };
+use ff::PrimeField;
 use ff_ext::ExtensionField;
 use std::mem::MaybeUninit;
 
@@ -76,9 +77,9 @@ impl SignedExtendConfig {
         UInt::from_exprs_unchecked(vec![limb0, self.msb.expr() * 0xffff])
     }
 
-    pub fn assign_instance<E: ExtensionField>(
+    pub fn assign_instance<BaseField: PrimeField>(
         &self,
-        instance: &mut [MaybeUninit<E::BaseField>],
+        instance: &mut [MaybeUninit<BaseField>],
         lk_multiplicity: &mut LkMultiplicity,
         val: u64,
     ) -> Result<(), ZKVMError> {
@@ -91,7 +92,7 @@ impl SignedExtendConfig {
         };
 
         assert_ux(lk_multiplicity, 2 * val - (msb << self.n_bits));
-        set_val!(instance, self.msb, E::BaseField::from(msb));
+        set_val!(instance, self.msb, BaseField::from(msb));
 
         Ok(())
     }
diff --git a/ceno_zkvm/src/instructions/riscv/memory/load.rs b/ceno_zkvm/src/instructions/riscv/memory/load.rs
index 1bc76f31..1a10234f 100644
--- a/ceno_zkvm/src/instructions/riscv/memory/load.rs
+++ b/ceno_zkvm/src/instructions/riscv/memory/load.rs
@@ -249,7 +249,7 @@ impl<E: ExtensionField, I: RIVInstruction> Instruction<E> for LoadInstruction<E,
             _ => 0,
         };
         if let Some(signed_ext_config) = config.signed_extend_config.as_ref() {
-            signed_ext_config.assign_instance::<E>(instance, lk_multiplicity, val)?;
+            signed_ext_config.assign_instance(instance, lk_multiplicity, val)?;
         }
 
         Ok(())
diff --git a/ceno_zkvm/src/instructions/riscv/mulh.rs b/ceno_zkvm/src/instructions/riscv/mulh.rs
index 19f92a32..91c987e0 100644
--- a/ceno_zkvm/src/instructions/riscv/mulh.rs
+++ b/ceno_zkvm/src/instructions/riscv/mulh.rs
@@ -284,7 +284,7 @@ impl<E: ExtensionField> Signed<E> {
         lkm: &mut LkMultiplicity,
         val: &Value<u32>,
     ) -> Result<i32, ZKVMError> {
-        self.is_negative.assign_instance::<E>(
+        self.is_negative.assign_instance(
             instance,
             lkm,
             *val.as_u16_limbs().last().unwrap() as u64,
diff --git a/ceno_zkvm/src/instructions/riscv/shift_imm.rs b/ceno_zkvm/src/instructions/riscv/shift_imm.rs
index 8b8f46b2..3541fcf0 100644
--- a/ceno_zkvm/src/instructions/riscv/shift_imm.rs
+++ b/ceno_zkvm/src/instructions/riscv/shift_imm.rs
@@ -139,7 +139,7 @@ impl<E: ExtensionField, I: RIVInstruction> Instruction<E> for ShiftImmInstructio
             InsnKind::SLLI => (rs1_read.as_u64() * imm as u64) >> UInt::<E>::TOTAL_BITS,
             InsnKind::SRAI | InsnKind::SRLI => {
                 if I::INST_KIND == InsnKind::SRAI {
-                    config.is_lt_config.as_ref().unwrap().assign_instance::<E>(
+                    config.is_lt_config.as_ref().unwrap().assign_instance(
                         instance,
                         lk_multiplicity,
                         *rs1_read.as_u16_limbs().last().unwrap() as u64,
diff --git a/ceno_zkvm/src/instructions/riscv/slti.rs b/ceno_zkvm/src/instructions/riscv/slti.rs
index 85efba19..557524c2 100644
--- a/ceno_zkvm/src/instructions/riscv/slti.rs
+++ b/ceno_zkvm/src/instructions/riscv/slti.rs
@@ -116,7 +116,7 @@ impl<E: ExtensionField, I: RIVInstruction> Instruction<E> for SetLessThanImmInst
                     .assign_instance(instance, lkm, rs1 as u64, imm as u64)?;
             }
             InsnKind::SLTI => {
-                config.is_rs1_neg.as_ref().unwrap().assign_instance::<E>(
+                config.is_rs1_neg.as_ref().unwrap().assign_instance(
                     instance,
                     lkm,
                     *rs1_value.as_u16_limbs().last().unwrap() as u64,

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@KimiWu123 KimiWu123 Nov 1, 2024

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I added a PhantomData<E> in SignedExtendConfig in 1a8f40a. The reason why I added that is because I want to make our generic type more consistent (aligned to ExtensionField instead of BaseField). What do you think?

_marker: PhantomData<E>,

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I think that can also work, yes. Let me double check.

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@KimiWu123 I extracted the phantom data change to #518 because this PR was getting a bit too long for me to wrap my head around.

So we can get #518 in first, and that should make this PR easier to read.

@KimiWu123 KimiWu123 force-pushed the feat/#482-unify-signed-bit-extraction branch from 652ac42 to 1f8162a Compare November 1, 2024 03:34
},
)
cb.namespace(name_fn, |cb| {
// is_lt is set if top limb of val is negative
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The wording here is a bit confusing. Let me think of a better one.

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We don't need this comment now so I removed it.

ceno_zkvm/src/instructions/riscv/mulh.rs Show resolved Hide resolved
@@ -292,171 +292,6 @@ impl<const M: usize, const C: usize, E: ExtensionField> UIntLimbs<M, C, E> {
}
}

impl<const M: usize, E: ExtensionField> UIntLimbs<M, 8, E> {
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It's very satisfying that we can remove all this code. Nice!

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Looks like a nice improvement.

Please have a look at my comments (especially the one about type inference) before merging, but I'm otherwise really happy with this in principle.

matthiasgoergens added a commit that referenced this pull request Nov 1, 2024
To help with type inference.

Extracted from #515 for easier
review.
@matthiasgoergens matthiasgoergens enabled auto-merge (squash) November 1, 2024 07:00
@KimiWu123 KimiWu123 force-pushed the feat/#482-unify-signed-bit-extraction branch from 5bbbe88 to 8ed431d Compare November 1, 2024 07:30
@KimiWu123 KimiWu123 force-pushed the feat/#482-unify-signed-bit-extraction branch from 8ed431d to 3a0f89c Compare November 1, 2024 07:33
@KimiWu123 KimiWu123 disabled auto-merge November 1, 2024 07:34
@KimiWu123 KimiWu123 merged commit 99898dc into master Nov 1, 2024
6 checks passed
@KimiWu123 KimiWu123 deleted the feat/#482-unify-signed-bit-extraction branch November 1, 2024 07:39
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Unify signed bit extraction via gadget
2 participants