Remove MRET
#497
Merged
Remove MRET
#497
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There are many extensions to RiscV. We only support one of them: 'RV32M' (which includes multiplication and division). Generally, we ignore the unsupported extenions. There's no trace of floating point or compressed instructions in our code. For some reason a snippet of one of the priviliged instructions has made it into our code: MRET. We don't actually support it anyway, so we might as well remove it. Just like we have no trace of any of the other unsupported extensions in our code.
| @@ -182,8 +182,8 @@ pub enum InsnKind { | |||
| SB, | |||
| SH, | |||
| SW, | |||
| /// ECALL and EBREAK etc. | |||
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EANY isn't actually part of the Risc-V standard, so it's hard to look up what it's supposed to mean. Hence the (admittedly unrelated) addition here.
naure
approved these changes
Oct 30, 2024
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There are many extensions to RiscV. We only support one of them: 'RV32M' (which includes multiplication and division).
Generally, we ignore the unsupported extenions. There's no trace of floating point or compressed instructions in our code.
For some reason a snippet of one of the priviliged instructions has made it into our code: MRET. We don't actually support it anyway, so we might as well remove it. Just like we have no trace of any of the other unsupported extensions in our code.