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Fix/divu remainder larger than quotient #335

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merged 11 commits into from
Oct 10, 2024

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KimiWu123
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@KimiWu123 KimiWu123 commented Oct 8, 2024

Desc.

This PR is trying to integrate DivConfig introduced in #304 into divu opcode. However,DivConfig fails when divisor is zero.

Findings

assert_less_than should be None in this case since both of lhs: remainder and rhs: divisor are witnesses and range-checked.

let r_lt = cb.less_than(
|| "remainder < divisor",
remainder.value(),
divisor.value(),
None,
UINT_LIMBS,
)?;


Update

In the first place, this PR is trying to fix a failure when divisor is zero. During fixing this issue, realized we don't really need DivConfig since there are not much duplicated code between SRL and DIVU. Therefore, we don't really need to "fix" this issue since it works well on SRL. But I need to add "remainder < divisor" constraints in DIVU.
I was trying to use DivConfig in this PR, but it made more complicated code. So, the current version is only to add remainder < divisor constraints in divu.

Changes

  • Fixing under constraints in less_than
  • Adding "remainder < divisor" constraint in divu
  • Adding some tests for SRL and SLL

@KimiWu123 KimiWu123 force-pushed the fix/divu-remainder_larger_than_quotient branch from 8e15306 to 77a250c Compare October 8, 2024 06:39
@KimiWu123 KimiWu123 changed the title [WIP] Fix/divu remainder larger than quotient Fix/divu remainder larger than quotient Oct 8, 2024
@KimiWu123 KimiWu123 force-pushed the fix/divu-remainder_larger_than_quotient branch from 77a250c to 37085d1 Compare October 8, 2024 06:50
@KimiWu123 KimiWu123 marked this pull request as ready for review October 8, 2024 06:54
@KimiWu123 KimiWu123 requested review from hero78119 and zemse October 8, 2024 07:42
Comment on lines +199 to +206
fn test_opcode_srl() {
verify::<SrlOp>("basic", 0b_1000, 3, 0b_0001);
// 33 >> 33 === 33 >> 1
verify::<SrlOp>(0b_1001, 1, 0b_100);
verify::<SrlOp>("rs2 over 5-bits", 0b_1010, 33, 0b_0101);
verify::<SrlOp>("bit loss", 0b_1001, 1, 0b_0100);
verify::<SrlOp>("zero shift", 0b_1000, 0, 0b_1000);
verify::<SrlOp>("all zeros", 0b_0000, 0, 0b_0000);
verify::<SrlOp>("base is zero", 0b_0000, 1, 0b_0000);
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Is it better to merge the test cases?

When we do any change in the future, the cargo test console printing is good, it highlights the tests that fail and pass. This can be a good DX.

If we merge the tests in single one, the tests run serially until mock prover panics in one of them. But if we want just a single test for opcode for less verbosity while cargo test then ok.

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@hero78119 hero78119 Oct 8, 2024

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I vote +1 for the design, and think for now merge all of them in one place improve readibility, and we dont need to come up with function name for each small case. If we suffer one failed, we can easily targeting which is failed with small effort.

Later, we can have macro to rendering test cases, similar tricks we have in another project zkevm (sth like this https://github.com/privacy-scaling-explorations/zkevm-circuits/blob/main/integration-tests/tests/circuits.rs#L113-L128), so it looks like test are write in single place, but macro will help to expand to rust test implementation. With that, we can achieve both good readibility + rendering test individually.

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Is it better to merge the test cases?

When we do any change in the future, the cargo test console printing is good, it highlights the tests that fail and pass. This can be a good DX.

I completely understand your point. I’ve faced similar challenges when verifying tests, just as you mentioned. However, I find that this pattern helps me think about which types of tests might be missing. Having more tests is really important for me, so making the process easier is definitely helpful.

ceno_zkvm/src/gadgets/div.rs Show resolved Hide resolved
ceno_zkvm/src/gadgets/div.rs Outdated Show resolved Hide resolved
@KimiWu123 KimiWu123 force-pushed the fix/divu-remainder_larger_than_quotient branch from 12b7d72 to a8387c9 Compare October 9, 2024 03:32
@KimiWu123 KimiWu123 force-pushed the fix/divu-remainder_larger_than_quotient branch from a8387c9 to 77063b7 Compare October 9, 2024 03:39
@KimiWu123 KimiWu123 requested a review from hero78119 October 9, 2024 06:08
hero78119 pushed a commit that referenced this pull request Oct 9, 2024
On every PR GitHub helpfully complains about 'Unchanged files with check
annotations'. So here we silence most of that, to make all our PRs
easier to review. Either by outright fixing the issue, or by flagging it
to the compiler as a known problem.

This should make it easier for me to review eg
#335 (or any other PR).
@KimiWu123 KimiWu123 force-pushed the fix/divu-remainder_larger_than_quotient branch from 582a84b to 594bc28 Compare October 10, 2024 02:11
@KimiWu123 KimiWu123 force-pushed the fix/divu-remainder_larger_than_quotient branch from 594bc28 to 9b6d1a6 Compare October 10, 2024 02:16
@KimiWu123 KimiWu123 force-pushed the fix/divu-remainder_larger_than_quotient branch from 128277e to 681eba9 Compare October 10, 2024 02:45
ceno_zkvm/src/instructions/riscv/divu.rs Outdated Show resolved Hide resolved
ceno_zkvm/src/instructions/riscv/divu.rs Outdated Show resolved Hide resolved
ceno_zkvm/src/chip_handler/general.rs Outdated Show resolved Hide resolved
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LGTM
Thanks for fixing reported issue and refactor :)

@hero78119 hero78119 enabled auto-merge (squash) October 10, 2024 06:16
@hero78119 hero78119 merged commit 718def0 into master Oct 10, 2024
6 checks passed
@hero78119 hero78119 deleted the fix/divu-remainder_larger_than_quotient branch October 10, 2024 06:19
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3 participants