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We want to integrate testing for RISC-V before merging RISC-V specific code, ideally resolving rust-vmm/rust-vmm-container#96. |
I've proposed using x86_64 machine to cross-compile and |
@TimePrinciple Can you please split the arm64 & x86-64 bindings regenerations into their own separate patches and put them into a new PR as I think it may be some time until the required RISC-V CI enabling is available. |
Sure thing. But am I going to do it with the latest kernel version or just stick to v6.9. |
v6.9 only just came out - it will be a while for another so seems fine to stick with that. |
I mean if I'm going to split the x86_64 and arm bindings into a new PR, what kernel version would be suitable for me to do the regeneration. |
I would stick with v6.9 - just split your existing work into different commits - no need to change the content. :-) |
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I currently have no clue on what's going on inside the runners, I tried those CI commands locally, everything works fine. I propose vendor all dependencies outside QEMU, which could address this problem, but a lot of modifications are to be made. |
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In the container we do |
BTW I'm expecting that the DHCP implemented by the |
GitHub's PR linking strikes again |
Bumps [rust-vmm-ci](https://github.com/rust-vmm/rust-vmm-ci) from `9f641f2` to `55ee075`. - [Commits](rust-vmm/rust-vmm-ci@9f641f2...55ee075) Which has RISC-V CI ready to be enabled. Signed-off-by: Ruoqing He <[email protected]>
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I would like to know how do we fix this |
You can just adjust the value in the json file, the toolchain update caused this in a few repositories for some reason |
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It's ready now, please take a look when convenient @stefano-garzarella @roypat @rbradford , many thanks 😊 |
Introduce RISC-V KVM bindings for Linux kernel v6.9, and enable RISC-V CI in `.platform` file. Signed-off-by: Ruoqing He <[email protected]>
Replace `aarch` with `arm` to meet the expected architecture. Signed-off-by: Ruoqing He <[email protected]>
Setting code coverage to 79.17% as `test_coverage.py` reported. Signed-off-by: Ruoqing He <[email protected]>
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Updated arm64, x86_64, and added riscv kvm bindings according to v6.9 kernel source.
Summary of the PR
Generate riscv bindings, and regenerate arm64, x86-64 bindings from v6.9. I've noticed #92, but it has not seen changes for a while, so I decided to push the work. I'm currently working on adding support to
kvm-ioctls
on riscv.And I wonder how to add cross-compilation test CIs in
rust-vmm-ci
, may be configure a x86_64 ubuntu and set therunner
field to/usr/bin/qemu-riscv64
or something?Requirements
Before submitting your PR, please make sure you addressed the following
requirements:
git commit -s
), and the commit message has max 60 characters for thesummary and max 75 characters for each description line.
test.
Release" section of CHANGELOG.md (if no such section exists, please create one).
unsafe
code is properly documented.