v0.7.1-prelease

What's Changed - Spec Changes, fixes and clarifications:

• Removed that prefetch instructions can throw exceptions by @francislaus in #7
• Added exceptions to compressed jump instructions by @francislaus in #26
• [RISCV-CHERI] Fix description of CSetMode by @veselypeta in #27
• correct prerequisite rules by @tariqkurd-repo in #35
• correct shift and add operands by @tariqkurd-repo in #33
• fixed prerequisite rules for 16-bit fp dp load/store by @tariqkurd-repo in #45
• Make permission bit order consistent by @Timmmm in #36
• Specify value of mode bit in null/infinite caps by @Timmmm in #19
• Fix issue 42 (XLEN-bit results of CSR instructions must be sign extended to XLENMAX ) by @tariqkurd-repo in #49
• Fix issue 42 (XLEN-bit results of CSR instructions must be sign extended to XLENMAX ) by @tariqkurd-repo in #46
• clarify PCC bounds after zcmt instruction by @tariqkurd-repo in #76
• Clarify CJALR operation order by @Timmmm in #10
• Misaligned LC/SC is a fatal error by @sorear in #66
• Cbuildcap and ctestsubset do not use DDC by @francislaus in #82
• Csealentry changes by @tariqkurd-repo in #105
• Added note to cbuildcap and reserved cs1 == 0 by @francislaus in #103
• replace null-cap CSR reset values with a tag clear (fixes issue 43) by @tariqkurd-repo in #101
• Fix issue 90 (debug mode spec) by @tariqkurd-repo in #113
• Clarify that sealing check is not needed on pcc by @andresag01 in #112
• Allow CSRRS/C to read CLEN-wide values by @andresag01 in #108
• Clarify csrr[s|c]i write behavior when imm=0 by @andresag01 in #117
• capability mode enables and register access controls for Zcheri_legacy by @sorear in #81
• Capabilities are little endian by @sorear in #119
• Document that DDC/DDDC are address pointers and can be compressed by @andresag01 in #98
• Specify behaviour for reserved permission encoding by @Timmmm in #53
• Clarify difference in IE between current spec and CHERI v9 by @andresag01 in #97

Mnemonic renaming

• remove C prefix from capability mode load/store/atomics by @tariqkurd-repo in #87
• rename CSHxADD opcodes to SHxADD by @tariqkurd-repo in #95
• Rename cheri insns by @tariqkurd-repo in #109
• Rename AUIPCC, CJ* and fix some other minor documentation issues by @tariqkurd-repo in #104

Generation or formatting

• Support building HTML output by @Timmmm in #12
• Minor fixes and formatting changes by @PeterRugg in #11
• improve wording by @axel-h in #24
• Deploy to Github pages on release by @Timmmm in #21
• representable range description, and some other minor clarifications by @tariqkurd-repo in #22
• Remove sole reference to embedded exponent by @Timmmm in #38
• improve wording about about tag by @axel-h in #61
• Sync with template repository to add pre-commit checks and CI by @arichardson in #68
• Don't override VERSION and REVMARK for default actions builds by @arichardson in #73
• Section with Special Capabilities by @axel-h in #62
• Add newline between includes to fix chapter headers by @andresag01 in #75
• Add a link to the latest spec to the README by @arichardson in #78
• Merge from templates repo by @arichardson in #79
• Minor fixes by @sorear in #54
• Deploy GitHub pages on every commit to main by @arichardson in #89
• fix destination type for sc.c by @tariqkurd-repo in #102
• PCC does not grant store permission before PTE checks by @andresag01 in #111

New Contributors

• @francislaus made their first contribution in #7
• @Timmmm made their first contribution in #12
• @PeterRugg made their first contribution in #11
• @axel-h made their first contribution in #24
• @veselypeta made their first contribution in #27
• @tariqkurd-repo made their first contribution in #35
• @arichardson made their first contribution in #68
• @sorear made their first contribution in #66

Full Changelog: v0.0.1-prerelease...v0.7.1