Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Adding comma to list #425

Merged
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion src/insns/csrrw_32bit.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ The assembler pseudo-instruction to write a capability CSR in {cheri_cap_mode_na
+
Access to XLEN-wide CSRs from other extensions is as specified by RISC-V.

NOTE: When writing `cs1`, if the bounds are <<section_cap_malformed,malformed>>, any reserved bits are set
NOTE: When writing `cs1`, if the bounds are <<section_cap_malformed,malformed>>, any reserved bits are set,
or the permission could not have been produced by <<ACPERM>> then clear the tag before writing to the CSR.

Permissions::
Expand Down
Loading