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Release v4.0.0
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renesas-fsp-development committed Aug 29, 2022
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5 changes: 3 additions & 2 deletions README.md
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Expand Up @@ -10,7 +10,7 @@ FSP uses an open software ecosystem and provides flexibility in using your prefe

### Current Release

[FSP v3.8.0](https://github.com/renesas/fsp/releases/tag/v3.8.0)
[FSP v4.0.0](https://github.com/renesas/fsp/releases/tag/v4.0.0)

### Supported RA MCU Kits

Expand Down Expand Up @@ -62,12 +62,13 @@ For a list of software modules packaged with FSP, see [Supported Software](SUPPO
- FSP versions of 3.4.0 and later require a minimum e² studio version of 2021-10.
- FSP versions of 3.6.0 and later require a minimum e² studio version of 2022-01.
- FSP versions of 3.7.0 and later require a minimum e² studio version of 2022-04.
- FSP versions of 4.0.0 and later require a minimum e² studio version of 2022-07.

If you have already installed a previous FSP release that included e² studio then you can download the packs separately. These are available for download under the Assets section for each release. There is a zipped version, FSP_Packs_\<version\>.zip, and an installer version, FSP_Packs_\<version\>.exe.

#### For new users that are using FSP with e² studio

1. Download the FSP with e² studio Installer from the Assets section of the [current release](https://github.com/renesas/fsp/releases/tag/v3.8.0).
1. Download the FSP with e² studio Installer from the Assets section of the [current release](https://github.com/renesas/fsp/releases/tag/v4.0.0).
2. Run the installer. This will install the e² studio tool, FSP packs, GCC toolchain and other tools required to use this software. No additional installations are required.

#### If using RA Smart Configurator (RASC) with IAR Embedded Workbench or Keil MDK ####
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163 changes: 82 additions & 81 deletions SUPPORTED_SOFTWARE.md

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2 changes: 1 addition & 1 deletion ra/board/ra6m2_ek/board_ethernet_phy.h
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Expand Up @@ -37,7 +37,7 @@ FSP_HEADER
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
#define BOARD_PHY_TYPE (0)
#define BOARD_PHY_TYPE (0) // DEPRECATED
#define BOARD_PHY_REF_CLK (1)

/***********************************************************************************************************************
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5 changes: 3 additions & 2 deletions ra/board/ra6m3_ek/board_ethernet_phy.h
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Expand Up @@ -37,8 +37,9 @@ FSP_HEADER
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
#define BOARD_PHY_TYPE (1)
#define BOARD_PHY_REF_CLK (1)
#define BOARD_PHY_TYPE (1) // DEPRECATED
#define ETHER_PHY_CFG_TARGET_KSZ8091RNB_ENABLE (1)
#define BOARD_PHY_REF_CLK (1)

/***********************************************************************************************************************
* Typedef definitions
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6 changes: 4 additions & 2 deletions ra/board/ra6m3g_ek/board_ethernet_phy.h
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Expand Up @@ -37,8 +37,10 @@ FSP_HEADER
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
#define BOARD_PHY_TYPE (1)
#define BOARD_PHY_REF_CLK (1)
#define BOARD_PHY_TYPE (1) // DEPRECATED
#define ETHER_PHY_CFG_TARGET_KSZ8091RNB_ENABLE (1)
#define ETHER_PHY_LSI_TYPE_KIT_COMPONENT ETHER_PHY_LSI_TYPE_KSZ8091RNB
#define BOARD_PHY_REF_CLK (1)

/***********************************************************************************************************************
* Typedef definitions
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6 changes: 4 additions & 2 deletions ra/board/ra6m4_ek/board_ethernet_phy.h
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Expand Up @@ -37,8 +37,10 @@ FSP_HEADER
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
#define BOARD_PHY_TYPE (1)
#define BOARD_PHY_REF_CLK (1)
#define BOARD_PHY_TYPE (1) // DEPRECATED
#define ETHER_PHY_CFG_TARGET_KSZ8091RNB_ENABLE (1)
#define ETHER_PHY_LSI_TYPE_KIT_COMPONENT ETHER_PHY_LSI_TYPE_KSZ8091RNB
#define BOARD_PHY_REF_CLK (1)

/***********************************************************************************************************************
* Typedef definitions
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6 changes: 4 additions & 2 deletions ra/board/ra6m5_ck/board_ethernet_phy.h
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Expand Up @@ -37,8 +37,10 @@ FSP_HEADER
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
#define BOARD_PHY_TYPE (4)
#define BOARD_PHY_REF_CLK (1)
#define BOARD_PHY_TYPE (4) // DEPRECATED
#define ETHER_PHY_CFG_TARGET_ICS1894_ENABLE (1)
#define ETHER_PHY_LSI_TYPE_KIT_COMPONENT ETHER_PHY_LSI_TYPE_ICS1894
#define BOARD_PHY_REF_CLK (1)

/***********************************************************************************************************************
* Typedef definitions
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6 changes: 4 additions & 2 deletions ra/board/ra6m5_ek/board_ethernet_phy.h
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Expand Up @@ -37,8 +37,10 @@ FSP_HEADER
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
#define BOARD_PHY_TYPE (1)
#define BOARD_PHY_REF_CLK (1)
#define BOARD_PHY_TYPE (1) // DEPRECATED
#define ETHER_PHY_CFG_TARGET_KSZ8091RNB_ENABLE (1)
#define ETHER_PHY_LSI_TYPE_KIT_COMPONENT ETHER_PHY_LSI_TYPE_KSZ8091RNB
#define BOARD_PHY_REF_CLK (1)

/***********************************************************************************************************************
* Typedef definitions
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70 changes: 70 additions & 0 deletions ra/fsp/inc/api/r_ble_api.h
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Expand Up @@ -2852,6 +2852,76 @@ typedef enum

/*@}*/

/* ============================================== Event Notification Definitions ========================================== */

#define BLE_EVENT_NOTIFY_CONNECTION_START_POS (0)
#define BLE_EVENT_NOTIFY_ADVERTISING_POS (1)
#define BLE_EVENT_NOTIFY_SCANNING_POS (2)
#define BLE_EVENT_NOTIFY_INITIATING_START_POS (3)
#define BLE_EVENT_NOTIFY_CONNECTION_CLOSE_POS (4)
#define BLE_EVENT_NOTIFY_ADVERTISING_CLOSE_POS (5)
#define BLE_EVENT_NOTIFY_SCANNING_CLOSE_POS (6)
#define BLE_EVENT_NOTIFY_INITIATING_CLOSE_POS (7)
#define BLE_EVENT_NOTIFY_DEEP_SLEEP_START_POS (8)
#define BLE_EVENT_NOTIFY_DEEP_SLEEP_WAKEUP_POS (9)

/******************************************************************************************************************//**
* @typedef ble_mcu_clock_change_cb_t
* @brief ble_mcu_clock_change_cb_t is the callback function type to use CLKOUT_RF as the MCU main clock source.
* @param none
* @return none
**********************************************************************************************************************/
typedef void (* ble_mcu_clock_change_cb_t)(void);

/******************************************************************************************************************//**
* @typedef ble_rf_notify_cb_t
* @brief ble_rf_notify_cb_t is the RF event notify callback function type.
* @param[in] uint32_t The information of RF event notification.
* @return none
**********************************************************************************************************************/
typedef void (* ble_rf_notify_cb_t)(uint32_t);

/******************************************************************************************************************//**
* @struct st_ble_rf_notify_t
* @brief This structure is RF event notify management.
**********************************************************************************************************************/
typedef struct
{
/**
* @brief Set enable/disable of each RF event notification
* @details
* Bit0 Notify Connection event start(0:Disable/1:Enable)\n
* Bit1 Notify Advertising event start(0:Disable/1:Enable)\n
* Bit2 Notify Scanning event start(0:Disable/1:Enable)\n
* Bit3 Notify Initiating event start(0:Disable/1:Enable)\n
* Bit4 Notify Connection event close(0:Disable/1:Enable)\n
* Bit5 Notify Advertising event close(0:Disable/1:Enable)\n
* Bit6 Notify Scanning event close(0:Disable/1:Enable)\n
* Bit7 Notify Initiating event close(0:Disable/1:Enable)\n
* Bit8 Notify RF_DEEP_SLEEP event start(0:Disable/1:Enable)\n
* Bit9 Notify RF_DEEP_SLEEP event close(0:Disable/1:Enable)\n
* Other Bit: Reserved for future use.\n
*/
uint32_t enable;

/**
* @brief Set callback function pointer for RF event start
*/
ble_rf_notify_cb_t start_cb;

/**
* @brief Set callback function pointer for RF event close
*/
ble_rf_notify_cb_t close_cb;

/**
* @brief Set callback function pointer for RF_DEEP_SLEEP
*/
ble_rf_notify_cb_t dsleep_cb;
} st_ble_rf_notify_t;

/*@}*/

/* ============================================== GAP Type Definitions ============================================== */

/** @addtogroup GAP_API
Expand Down
5 changes: 2 additions & 3 deletions ra/fsp/inc/api/r_can_api.h
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Expand Up @@ -161,9 +161,8 @@ typedef struct st_can_callback_args
uint32_t mailbox; ///< Mailbox number of interrupt source.
uint32_t buffer; ///< Buffer number of interrupt source.
};
can_frame_t * p_frame; // DEPRECATED Pointer to the received frame.
void const * p_context; ///< Context provided to user during callback.
can_frame_t frame; ///< Received frame data.
void const * p_context; ///< Context provided to user during callback.
can_frame_t frame; ///< Received frame data.
} can_callback_args_t;

/** CAN Configuration */
Expand Down
21 changes: 1 addition & 20 deletions ra/fsp/inc/api/r_cgc_api.h
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Expand Up @@ -169,26 +169,7 @@ typedef struct st_cgc_pll_cfg
* functions. */
typedef union u_cgc_divider_cfg
{
uint32_t sckdivcr_w; ///< (@ 0x4001E020) System clock Division control register

/* DEPRECATED: Anonymous structure. */
struct
{
cgc_sys_clock_div_t pclkd_div : 3; ///< Divider value for PCLKD
uint32_t : 1;
cgc_sys_clock_div_t pclkc_div : 3; ///< Divider value for PCLKC
uint32_t : 1;
cgc_sys_clock_div_t pclkb_div : 3; ///< Divider value for PCLKB
uint32_t : 1;
cgc_sys_clock_div_t pclka_div : 3; ///< Divider value for PCLKA
uint32_t : 1;
cgc_sys_clock_div_t bclk_div : 3; ///< Divider value for BCLK
uint32_t : 5;
cgc_sys_clock_div_t iclk_div : 3; ///< Divider value for ICLK
uint32_t : 1;
cgc_sys_clock_div_t fclk_div : 3; ///< Divider value for FCLK
uint32_t : 1;
};
uint32_t sckdivcr_w; ///< (@ 0x4001E020) System clock Division control register

struct
{
Expand Down
19 changes: 0 additions & 19 deletions ra/fsp/inc/api/r_doc_api.h
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Expand Up @@ -57,16 +57,6 @@ FSP_HEADER
* Typedef definitions
**********************************************************************************************************************/

/** DOC status */
typedef struct e_doc_status
{
union
{
uint16_t result; ///< Result of a 16-bit operation.
uint32_t result_32; ///< Result of a 32-bit operation.
};
} doc_status_t;

/** Event that can trigger a callback function. */
typedef enum e_doc_event
{
Expand Down Expand Up @@ -148,15 +138,6 @@ typedef struct st_doc_api
*/
fsp_err_t (* close)(doc_ctrl_t * const p_ctrl);

/** DEPRECATED - Gets the result of addition/subtraction operations and stores it in the provided pointer p_status.
* @par Implemented as
* - @ref R_DOC_StatusGet()
* @param[in] p_ctrl Control block set in @ref doc_api_t::open call.
* @param[out] p_data Provides the 16 bit result of the addition/subtraction operation
* at the user defined location.
*/
fsp_err_t (* statusGet)(doc_ctrl_t * const p_ctrl, doc_status_t * p_status);

/** Gets the result of addition/subtraction operations and stores it in the provided pointer p_result.
* @par Implemented as
* - @ref R_DOC_Read()
Expand Down
25 changes: 0 additions & 25 deletions ra/fsp/inc/api/r_ether_api.h
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Expand Up @@ -104,28 +104,6 @@ typedef enum e_ether_padding
ETHER_PADDING_3BYTE = 3,
} ether_padding_t;

/** EDMAC descriptor as defined in the hardware manual.
* Structure must be packed at 1 byte.
*/
typedef struct st_ether_instance_descriptor
{
volatile uint32_t status;
#if ((defined(__GNUC__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)) || (defined(__ARMCC_VERSION) && \
!defined(__ARM_BIG_ENDIAN)) || (defined(__ICCARM__) && (__LITTLE_ENDIAN__)))

/* Little endian */
volatile uint16_t size;
volatile uint16_t buffer_size;
#else

/* Big endian */
volatile uint16_t buffer_size;
volatile uint16_t size;
#endif
uint8_t * p_buffer;
struct st_ether_instance_descriptor * p_next;
} ether_instance_descriptor_t;

/** Event code of callback function */
typedef enum
{
Expand Down Expand Up @@ -165,9 +143,6 @@ typedef struct st_ether_cfg
uint32_t broadcast_filter; ///< Limit of the number of broadcast frames received continuously
uint8_t * p_mac_address; ///< Pointer of MAC address

ether_instance_descriptor_t * p_rx_descriptors; ///< Receive descriptor buffer pool
ether_instance_descriptor_t * p_tx_descriptors; ///< Transmit descriptor buffer pool

uint8_t num_tx_descriptors; ///< Number of transmission descriptor
uint8_t num_rx_descriptors; ///< Number of receive descriptor

Expand Down
12 changes: 12 additions & 0 deletions ra/fsp/inc/api/r_ether_phy_api.h
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Expand Up @@ -59,6 +59,16 @@ FSP_HEADER
* Typedef definitions
**********************************************************************************************************************/

/** Phy LSI */
typedef enum e_ether_phy_lsi_type
{
ETHER_PHY_LSI_TYPE_DEFAULT = 0, ///< Select default configuration. This type dose not change Phy LSI default setting by strapping option.
ETHER_PHY_LSI_TYPE_KSZ8091RNB = 1, ///< Select configuration for KSZ8091RNB.
ETHER_PHY_LSI_TYPE_KSZ8041 = 2, ///< Select configuration for KSZ8041.
ETHER_PHY_LSI_TYPE_DP83620 = 3, ///< Select configuration for DP83620.
ETHER_PHY_LSI_TYPE_ICS1894 = 4, ///< Select configuration for ICS1894.
} ether_phy_lsi_type_t;

/** Flow control functionality */
typedef enum e_ether_phy_flow_control
{
Expand Down Expand Up @@ -98,6 +108,8 @@ typedef struct st_ether_phy_cfg
uint32_t phy_reset_wait_time; ///< Wait time for PHY-LSI reboot
int32_t mii_bit_access_wait_time; ///< Wait time for MII/RMII access

ether_phy_lsi_type_t phy_lsi_type; ///< Phy LSI type

ether_phy_flow_control_t flow_control; ///< Flow control functionally enable or disable
ether_phy_mii_type_t mii_type; ///< Interface type is MII or RMII

Expand Down
25 changes: 0 additions & 25 deletions ra/fsp/inc/api/r_ioport_api.h
Original file line number Diff line number Diff line change
Expand Up @@ -177,22 +177,6 @@ typedef enum e_ioport_peripheral
IOPORT_PERIPHERAL_PGAOUT1 = (0x1EUL << IOPORT_PRV_PFS_PSEL_OFFSET),
} ioport_peripheral_t;

/* DEPRECATED Superset of Ethernet channels. */
typedef enum e_ioport_eth_ch
{
IOPORT_ETHERNET_CHANNEL_0 = 0x10, ///< Used to select Ethernet channel 0
IOPORT_ETHERNET_CHANNEL_1 = 0x20, ///< Used to select Ethernet channel 1
IOPORT_ETHERNET_CHANNEL_END ///< Marks end of enum - used by parameter checking
} ioport_ethernet_channel_t;

/* DEPRECATED Superset of Ethernet PHY modes. */
typedef enum e_ioport_eth_mode
{
IOPORT_ETHERNET_MODE_RMII = 0x00, ///< Ethernet PHY mode set to MII
IOPORT_ETHERNET_MODE_MII = 0x10, ///< Ethernet PHY mode set to RMII
IOPORT_ETHERNET_MODE_END ///< Marks end of enum - used by parameter checking
} ioport_ethernet_mode_t;

/** Options to configure pin functions */
typedef enum e_ioport_cfg_options
{
Expand Down Expand Up @@ -294,15 +278,6 @@ typedef struct st_ioport_api
*/
fsp_err_t (* pinEventOutputWrite)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t pin_value);

/* DEPRECATED Configure the PHY mode of the Ethernet channels.
* @par Implemented as
* - @ref R_IOPORT_EthernetModeCfg()
* @param[in] channel Channel configuration will be set for.
* @param[in] mode PHY mode to set the channel to.
*/
fsp_err_t (* pinEthernetModeCfg)(ioport_ctrl_t * const p_ctrl, ioport_ethernet_channel_t channel,
ioport_ethernet_mode_t mode);

/** Read level of a pin.
* @par Implemented as
* - @ref R_IOPORT_PinRead()
Expand Down
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