deploy: 9418a96

.buildinfo

@@ -0,0 +1,4 @@
+# Sphinx build info version 1
+# This file hashes the configuration used when building these files. When it is not found, a full rebuild will be done.
+config: 7880837500a3a4a774c7749be26db499
+tags: 645f666f9bcd5a90fca523b33c5a78b7

_sources/cite.rst.txt

@@ -0,0 +1,19 @@
+=============
+Citation
+=============
+
+If you are using our code, please consider citing our work below:
+
+.. code:: bib
+
+   @article{zen_quantum_2024,
+     title={Quantum Circuit Discovery for Fault-Tolerant Logical State Preparation with Reinforcement Learning},
+     author={Zen, Remmy and Olle, Jan and Colmenarez, Luis and Puviani, Matteo and M{\"u}ller, Markus and Marquardt, Florian},
+     url = {http://arxiv.org/abs/2402.17761},
+     journal={arXiv preprint arXiv:2402.17761},
+     urldate = {2024-02-27},
+     publisher = {arXiv},
+     month = feb,
+     year = {2024},
+     note = {arXiv:2402.17761 [quant-ph]},
+   }

_sources/index.rst.txt

@@ -0,0 +1,52 @@
+.. rlftqc documentation master file, created by
+   sphinx-quickstart on Sun Feb 11 16:19:29 2024.
+   You can adapt this file completely to your liking, but it should at least
+   contain the root `toctree` directive.
+
+#################
+Reinforcement Learning for Fault-Tolerant Quantum Circuit Discovery (rlftqc)
+#################
+
+Welcome to the documentation for rlftqc!
+
+This is a code repository for quantum circuit discovery for fault-tolerant logical state preparation with reinforcement learning.
+
+See the paper here: |arXiv|
+
+Description
+-----------
+
+This library can be used to train an RL agent for three different tasks:
+
+1. **Logical State Preparation**: Prepare a logical state from a given stabilizer QEC code. 
+
+2. **Verification Circuit Synthesis**: Prepare a verification circuit from a given logical state preparation circuit based on flag-qubit protocols [1] to make the state preparation fault-tolerant. 
+
+3. **Integrated Fault-Tolerant Logical State Preparation**: Integrates the above two tasks to prepare a logical state fault-tolerantly.
+
+For all the tasks, the user can specify the Clifford gate set and qubit
+connectivity.
+
+
+Contents:
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   installation
+   minimal_examples
+   cite
+   modules
+* :ref:`modindex`
+* :ref:`genindex`
+* :ref:`search`
+
+
+References
+================
+[1] Chamberland, Christopher, and Michael E. Beverland. “Flag fault-tolerant error correction with arbitrary distance codes.” Quantum 2 (2018): 53.
+
+
+.. |arXiv| image:: https://img.shields.io/badge/arXiv-2402.17761-b31b1b.svg
+   :target: https://arxiv.org/abs/2402.17761

_sources/installation.rst.txt

@@ -0,0 +1,32 @@
+#################
+Installation
+#################
+
+This document provides detailed instructions on how to install rlftqc. Please follow the steps appropriate for your operating system and environment.
+
+Prerequisites
+=============
+
+Before installing rlftqc, ensure you have the following prerequisites installed:
+
+- Python 3.10 or higher
+- pip (Python package installer)
+
+Installing from Source
+======================
+
+If you prefer to install rlftqc from the source code, follow these steps:
+
+1. Clone the repository:
+
+.. code-block:: bash
+
+    git clone https://github.com/remmyzen/rlftqc.git
+    cd rlftqc
+
+2. Install the project:
+
+.. code-block:: bash
+
+    pip install -r requirements.txt
+

_sources/minimal_examples.rst.txt

@@ -0,0 +1,87 @@
+#################
+Minimal Examples
+#################
+
+Logical State Preparation
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+For the logical state preparation task, you only need to specify the
+target stabilizers of your logical state.
+
+For example, the code below will train an RL agent to prepare the
+:math:`|0\rangle_L` of the 7-qubit Steane code. It uses :math:`H`,
+:math:`S`, and :math:`CNOT` gates and all-to-all qubit connectivity by
+default.
+
+.. code:: python
+
+   from rlftqc.logical_state_preparation import LogicalStatePreparation
+
+   target = ["+ZZZZZZZ", "+ZIZIZIZ", "+XIXIXIX", "+IZZIIZZ", "+IXXIIXX", "+IIIZZZZ", "+IIIXXXX"]
+
+   lsp = LogicalStatePreparation(target)
+   lsp.train()   ## Train the agent
+   lsp.run()     ## Run the agent to get the circuit
+
+Refer to the notebook ``notebooks/01 - Logical State Preparation.ipynb``
+for more advanced examples (e.g. change the gate set and qubit
+connectivity).
+
+Verification Circuit Synthesis
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+For the verification circuit synthesis task, you only need to specify
+the encoding circuit as a ``stim.Circuit`` `(see
+reference) <https://github.com/quantumlib/Stim/blob/main/doc/python_api_reference_vDev.md#stim.Circuit>`__
+or ``qiskit.QuantumCircuit`` `(see
+reference) <https://docs.quantum.ibm.com/api/qiskit/qiskit.circuit.QuantumCircuit>`__
+instance.
+
+For example, the code below will train an RL agent to synthesize a
+verification circuit to fault-tolerantly prepare :math:`|0\rangle_L` of
+the 7-qubit Steane code.
+
+.. code:: python
+
+   import stim
+   from rlftqc.verification_circuit_synthesis import VerificationCircuitSynthesis
+
+   ## Encoding circuit for the $|0\rangle_L$ of the 7-qubit Steane code.
+   circ = stim.Circuit(""" H 0 1 3
+   CX 0 6 1 5 0 4 3 4 3 5 5 6 0 2 1 2 """)
+
+   ## We can ignore Z error since we are preparing zero-logical of Steane code
+   vcs = VerificationCircuitSynthesis(circ, ignore_z_errors = True)  
+   vcs.train()   ## Train the agent
+   vcs.run()     ## Run the agent to get the circuit
+
+Refer to the notebook
+``notebooks/02 - Verification Circuit Synthesis.ipynb`` for more
+advanced examples.
+
+Integrated Fault-Tolerant Logical State Preparation
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+For the integrated logical state preparation task, you only need to
+specify the target stabilizers of your logical state.
+
+For example, the code below will train an RL agent to fault-tolerantly
+prepare the :math:`|0\rangle_L` of the 7-qubit Steane code.
+
+.. code:: python
+
+   from rlftqc.ft_logical_state_preparation import FTLogicalStatePreparation
+
+   target = ["+ZZZZZZZ", "+ZIZIZIZ", "+XIXIXIX", "+IZZIIZZ", "+IXXIIXX", "+IIIZZZZ", "+IIIXXXX"]
+
+   ## We can ignore Z error since we are preparing zero-logical of Steane code
+   ftlsp = FTLogicalStatePreparation(target, ignore_z_errors=True)
+   ftlsp.train()   ## Train the agent
+   ftlsp.run()     ## Run the agent to get the circuit
+
+Refer to the notebook
+``notebooks/03 - Integrated Fault-Tolerant Logical State Preparation.ipynb``
+for more advanced examples. ## Circuit Examples
+
+Go to this link to see the circuit examples that the RL agent has
+synthesized for various tasks in PNG, stim, and Latex formats.

_sources/modules.rst.txt

@@ -0,0 +1,7 @@
+Documentation
+======
+
+.. toctree::
+   :maxdepth: 4
+
+   source/rlftqc

_sources/source/modules.rst.txt

@@ -0,0 +1,7 @@
+rlftqc
+======
+
+.. toctree::
+   :maxdepth: 4
+
+   rlftqc

_sources/source/rlftqc.envs.rst.txt

@@ -0,0 +1,37 @@
+rlftqc.envs package
+===================
+
+Submodules
+----------
+
+rlftqc.envs.ft\_logical\_state\_preparation\_env module
+-------------------------------------------------------
+
+.. automodule:: rlftqc.envs.ft_logical_state_preparation_env
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+rlftqc.envs.logical\_state\_preparation\_env module
+---------------------------------------------------
+
+.. automodule:: rlftqc.envs.logical_state_preparation_env
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+rlftqc.envs.verification\_circuit\_synthesis\_env module
+--------------------------------------------------------
+
+.. automodule:: rlftqc.envs.verification_circuit_synthesis_env
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+Module contents
+---------------
+
+.. automodule:: rlftqc.envs
+   :members:
+   :undoc-members:
+   :show-inheritance:

_sources/source/rlftqc.rst.txt

@@ -0,0 +1,70 @@
+rlftqc package
+==============
+
+Subpackages
+-----------
+
+.. toctree::
+   :maxdepth: 4
+
+   rlftqc.envs
+   rlftqc.simulators
+
+Submodules
+----------
+
+rlftqc.agents module
+--------------------
+
+.. automodule:: rlftqc.agents
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+rlftqc.devices module
+---------------------
+
+.. automodule:: rlftqc.devices
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+rlftqc.ft\_logical\_state\_preparation module
+---------------------------------------------
+
+.. automodule:: rlftqc.ft_logical_state_preparation
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+rlftqc.logical\_state\_preparation module
+-----------------------------------------
+
+.. automodule:: rlftqc.logical_state_preparation
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+rlftqc.utils module
+-------------------
+
+.. automodule:: rlftqc.utils
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+rlftqc.verification\_circuit\_synthesis module
+----------------------------------------------
+
+.. automodule:: rlftqc.verification_circuit_synthesis
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+Module contents
+---------------
+
+.. automodule:: rlftqc
+   :members:
+   :undoc-members:
+   :show-inheritance:

_sources/source/rlftqc.simulators.rst.txt

@@ -0,0 +1,37 @@
+rlftqc.simulators package
+=========================
+
+Submodules
+----------
+
+rlftqc.simulators.clifford\_gates module
+----------------------------------------
+
+.. automodule:: rlftqc.simulators.clifford_gates
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+rlftqc.simulators.pauli\_string module
+--------------------------------------
+
+.. automodule:: rlftqc.simulators.pauli_string
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+rlftqc.simulators.tableau\_simulator module
+-------------------------------------------
+
+.. automodule:: rlftqc.simulators.tableau_simulator
+   :members:
+   :undoc-members:
+   :show-inheritance:
+
+Module contents
+---------------
+
+.. automodule:: rlftqc.simulators
+   :members:
+   :undoc-members:
+   :show-inheritance: