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Upgrade to qiskit 1.0 #105

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Upgrade to qiskit 1.0 #105

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442a490
fixed all the index and register problems in the utils
nbronn Feb 8, 2024
bf3306f
delete comments
kevinsung May 10, 2024
1578725
remove unnecessary parens
kevinsung May 10, 2024
c853f11
edit requirements
kevinsung May 10, 2024
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2 changes: 1 addition & 1 deletion pyproject.toml
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Expand Up @@ -48,4 +48,4 @@ dev = [

[tool.autoflake]
remove-unused-variables = true
imports = ["qiskit", "qiskit_aer", "qiskit_nature", "qiskit_ibm_runtime"]
imports = ["qiskit", "qiskit_aer"]
2 changes: 1 addition & 1 deletion qiskit_research/utils/dynamical_decoupling.py
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Expand Up @@ -238,7 +238,7 @@ def add_pulse_calibrations(
dag = circuit_to_dag(circuit)
for run in dag.collect_runs(["pi_phi"]):
for node in run:
qubit = node.qargs[0].index
qubit = dag.find_bit(node.qargs[0]).index
phi = node.op.params[0]
x_sched = inst_sched_map.get("x", qubits=[qubit])
_, x_instruction = x_sched.instructions[0]
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4 changes: 2 additions & 2 deletions qiskit_research/utils/gate_decompositions.py
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Expand Up @@ -102,8 +102,8 @@ def run(
dag: DAGCircuit,
) -> DAGCircuit:
for rzx_run in dag.collect_runs(["rzx"]):
control = rzx_run[0].qargs[0].index
target = rzx_run[0].qargs[1].index
control = dag.find_bit(rzx_run[0].qargs[0]).index
target = dag.find_bit(rzx_run[0].qargs[1]).index
cr_forward_dir = cr_forward_direction(
control, target, self._inst_map, self._ctrl_chans
)
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3 changes: 2 additions & 1 deletion qiskit_research/utils/pauli_twirling.py
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Expand Up @@ -107,7 +107,8 @@ def run(
if node.op.name in TWO_QUBIT_PAULI_GENERATORS:
mini_dag = DAGCircuit()
q0, q1 = node.qargs
mini_dag.add_qreg(q0.register)
# mini_dag.add_qreg(q0.register)
mini_dag.add_qreg(dag.find_bit(q0).registers[0][0])

theta = node.op.params[0]
this_pauli = Pauli(
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9 changes: 6 additions & 3 deletions qiskit_research/utils/pulse_scaling.py
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Expand Up @@ -253,9 +253,12 @@ def run(self, dag: DAGCircuit) -> DAGCircuit:
gp1 = next(dag.bfs_successors(rz_node))
if cx2_node in gp1[1]:
if (
(cx1_node.qargs[0].index == cx2_node.qargs[0].index)
and (cx1_node.qargs[1].index == cx2_node.qargs[1].index)
and (cx2_node.qargs[1].index == rz_node.qargs[0].index)
dag.find_bit(cx1_node.qargs[0]).index
== dag.find_bit(cx2_node.qargs[0]).index
and dag.find_bit(cx1_node.qargs[1]).index
== dag.find_bit(cx2_node.qargs[1]).index
and dag.find_bit(cx2_node.qargs[1]).index
== dag.find_bit(rz_node.qargs[0]).index
):
dag = self.sub_zz_in_dag(
dag, cx1_node, rz_node, cx2_node
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