Interrupts (#89)

* Fix and improve PIC8259 code.
* Detect spurious interrupts.
* Dispatch interrupts to the application layer.
* Initialize PIT8253 and enable timer interrupt.

include/jinue/shared/asm/i686.h

@@ -57,7 +57,7 @@
 #define JINUE_KLIMIT                        0xc0000000
 
 /** interrupt vector for system call software interrupt */
-#define JINUE_I686_SYSCALL_IRQ              0x80
+#define JINUE_I686_SYSCALL_INTERRUPT        0x80
 
 /** slow/safe interrupt-based system call implementation */
 #define JINUE_I686_HOWSYSCALL_INTERRUPT     0

include/kernel/application/asm/ticks.h

@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2024 Philippe Aubertin.
+ * All rights reserved.
+
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 
+ * 3. Neither the name of the author nor the names of other contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef JINUE_KERNEL_APPLICATION_ASM_TICKS_H
+#define JINUE_KERNEL_APPLICATION_ASM_TICKS_H
+
+#define TICKS_PER_SECOND 100
+
+#endif

include/kernel/application/interrupts.h

@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2024 Philippe Aubertin.
+ * All rights reserved.
+
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 
+ * 3. Neither the name of the author nor the names of other contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef JINUE_KERNEL_APPLICATION_INTERRUPTS_H
+#define JINUE_KERNEL_APPLICATION_INTERRUPTS_H
+
+void hardware_interrupt(int irq);
+
+void spurious_interrupt(void);
+
+void tick_interrupt(void);
+
+#endif

include/kernel/infrastructure/i686/asm/eflags.h

@@ -34,6 +34,8 @@
 
 #define EFLAGS_ALWAYS_1 (1<<1)
 
+#define EFLAGS_IF       (1<<9)
+
 #define EFLAGS_ID       (1<<21)
 
 #endif

include/kernel/infrastructure/i686/drivers/asm/pic8259.h

@@ -59,10 +59,25 @@
 /** ICW4 bit 0: 8086/8088 mode (1) or MCS-80/85 mode (0) */
 #define PIC8259_ICW4_UPM        (1<<0)
 
-/** ICW4 bit 1: Auto EOI*/
+/** ICW4 bit 1: Auto EOI */
 #define PIC8259_ICW4_AEOI       (1<<1)
 
+/** ICW4 bit 4: special (1) or "regular" (0) fully nested mode */
+#define PIC8259_ICW4_SFNM       (1<<4)
+
 /** OCW2: non-specific EOI command */
-#define PIC8259_EOI             0x20
+#define PIC8259_OCW2_EOI        0x20
+
+/** OCW3: read ISR (1) or IRR (0) when RR is also set */
+#define PIC8259_OCW3_RIS        (1<<0)
+
+/** OCW3: read register command when set */
+#define PIC8259_OCW3_RR         (1<<1)
+
+/** OCW3: always 1 to select OCW3, otherwise it's OCW2 */
+#define PIC8259_OCW3_1          (1<<3)
+
+/** OCW3: read Interrupt Service Register (ISR) */
+#define PIC8259_OCW3_READ_ISR   (PIC8259_OCW3_1 | PIC8259_OCW3_RR | PIC8259_OCW3_RIS)
 
 #endif

include/kernel/infrastructure/i686/drivers/asm/pit8253.h

@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2024 Philippe Aubertin.
+ * All rights reserved.
+
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the author nor the names of other contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef JINUE_KERNEL_INFRASTRUCTURE_I686_DRIVERS_ASM_PIT8253_H
+#define JINUE_KERNEL_INFRASTRUCTURE_I686_DRIVERS_ASM_PIT8253_H
+
+/* I/O addresses */
+
+#define PIT8253_IO_BASE         0x40
+
+#define PIT8253_IO_COUNTER0     (PIT8253_IO_BASE + 0)
+
+#define PIT8253_IO_COUNTER1     (PIT8253_IO_BASE + 1)
+
+#define PIT8253_IO_COUNTER2     (PIT8253_IO_BASE + 2)
+
+#define PIT8253_IO_CW_REG       (PIT8253_IO_BASE + 3)
+
+/* Individual flag definitions */
+
+/** BCD (1) or binary (0) counter selection */
+#define PIT8253_CW_BCD          (1<<0)
+
+#define PIT8253_CW_M0           (1<<1)
+
+#define PIT8253_CW_M1           (1<<2)
+
+#define PIT8253_CW_M2           (1<<3)
+
+#define PIT8253_CW_RL0          (1<<4)
+
+#define PIT8253_CW_RL1          (1<<5)
+
+#define PIT8253_CW_SC0          (1<<6)
+
+#define PIT8253_CW_SC1          (1<<7)
+
+/* Combined flags - select counter */
+
+#define PIT8253_CW_COUNTER0     0
+
+#define PIT8253_CW_COUNTER1     PIT8253_CW_SC0
+
+#define PIT8253_CW_COUNTER2     PIT8253_CW_SC1
+
+/* Combined flags - read/load */
+
+#define PIT8253_CW_LOAD_LSB_MSB (PIT8253_CW_RL1 | PIT8253_CW_RL0)
+
+/* Combined flags - mode */
+
+/** Mode 0: interrupt on terminal count */
+#define PIT8253_CW_MODE0        0
+
+/** Mode 1: programmable one-shot */
+#define PIT8253_CW_MODE1        PIT8253_CW_M0
+
+/** Mode 2: rate generator */
+#define PIT8253_CW_MODE2        PIT8253_CW_M1
+
+/** Mode 3: square wave rate generator */
+#define PIT8253_CW_MODE3        (PIT8253_CW_M1 | PIT8253_CW_M0)
+
+/** Mode 4: software-triggered strobe */
+#define PIT8253_CW_MODE4        PIT8253_CW_M2
+
+/** Mode 5: hardware-triggered strobe */
+#define PIT8253_CW_MODE5        (PIT8253_CW_M2 | PIT8253_CW_M0)
+
+/* Frequency parameters */
+
+/** Numerator of input frequency in MHz */
+#define PIT8253_FREQ_N          105
+
+/** Denominator of input frequency in MHz */
+#define PIT8253_FREQ_D          88
+
+#endif

include/kernel/infrastructure/i686/iodelay.h → include/kernel/infrastructure/i686/drivers/iodelay.h

@@ -29,8 +29,8 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#ifndef JINUE_KERNEL_INFRASTRUCTURE_I686_IODELAY_H
-#define JINUE_KERNEL_INFRASTRUCTURE_I686_IODELAY_H
+#ifndef JINUE_KERNEL_INFRASTRUCTURE_I686_DRIVERS_IODELAY_H
+#define JINUE_KERNEL_INFRASTRUCTURE_I686_DRIVERS_IODELAY_H
 
 void iodelay(void);
 

include/kernel/infrastructure/i686/drivers/pic8259.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019 Philippe Aubertin.
+ * Copyright (C) 2019-2024 Philippe Aubertin.
  * All rights reserved.
 
  * Redistribution and use in source and binary forms, with or without
@@ -33,13 +33,16 @@
 #define JINUE_KERNEL_INFRASTRUCTURE_I686_DRIVERS_PIC8259_H
 
 #include <kernel/infrastructure/i686/drivers/asm/pic8259.h>
+#include <stdbool.h>
 
 void pic8259_init();
 
 void pic8259_mask(int irq);
 
 void pic8259_unmask(int irq);
 
-void pic8259_ack(int irq);
+void pic8259_eoi(int irq);
+
+bool pic8259_is_spurious(int irq);
 
 #endif

include/kernel/infrastructure/i686/drivers/pit8253.h

@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2024 Philippe Aubertin.
+ * All rights reserved.
+
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the author nor the names of other contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef JINUE_KERNEL_INFRASTRUCTURE_I686_DRIVERS_PIT8253_H
+#define JINUE_KERNEL_INFRASTRUCTURE_I686_DRIVERS_PIT8253_H
+
+#include <kernel/infrastructure/i686/drivers/asm/pit8253.h>
+
+void pit8253_init(void);
+
+#endif