8344916: RISC-V: Misaligned access in array fill stub

[RealFYang]

Hi, Please review this small change.

In generate_fill, we fill the remaining elements by a single 8-byte store when the remaining count is less than 8 bytes in size after fill_words. This may overwrite some elements and create misaligned access. While it's not an issue for mordern CPUs with fast misaligned access, this does affect performance on CPUs where misaligned access is emulated by a trap handler and thus is very slow. async-profiler tells 2.8% cpu cycles of jshort_fill in flame graph when sampling Specjbb2005 on these platforms.

In this particular case, the copy address to is 8-byte aligned after fill_words. So if AvoidUnalignedAccesses is true, one choice would be directing control to L_fill_elements which avoids alignment issue while filling the remaining elements.

Test on linux-riscv64 platform:

• tier1-3 (release)
• 2.5% Specjbb2005 performance benefit on both HiFive Unmatched and Premier P550 SBCs.
• No obvious performance impact witnessed on other platforms like BFI-F3 or Pioneer box.

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Issue

• JDK-8344916: RISC-V: Misaligned access in array fill stub (Enhancement - P4)

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