Merge pull request #146 from opencompl/sasha/use-main

reenable snitch_stream tests

kernels/Makefile

@@ -36,7 +36,7 @@ CONV_8 = conv2d_d1_s1_3x3/1x1x8x8xf64
 CONV_8_TESTS =
 CONV_8_TESTS += $(CONV_8)/baseline.csv
 CONV_8_TESTS += $(CONV_8)/linalg.csv
-# CONV_8_TESTS += $(CONV_8)/snitch_stream.csv
+CONV_8_TESTS += $(CONV_8)/snitch_stream.csv
 CONV_8_TESTS += $(CONV_8)/snrt.csv
 # spill to j register...
 # CONV_8_TESTS += $(CONV_8)/scf_xdsl.csv
@@ -53,7 +53,7 @@ DDOT_128 = ddot/128xf64
 DDOT_128_TESTS =
 DDOT_128_TESTS += $(DDOT_128)/baseline.csv
 DDOT_128_TESTS += $(DDOT_128)/linalg.csv
-# DDOT_128_TESTS += $(DDOT_128)/snitch_stream.csv
+DDOT_128_TESTS += $(DDOT_128)/snitch_stream.csv
 DDOT_128_TESTS += $(DDOT_128)/snrt.csv
 DDOT_128_TESTS += $(DDOT_128)/scf_xdsl.csv
 DDOT_128_TESTS += $(DDOT_128)/scf.csv
@@ -73,7 +73,7 @@ DENSE_8_TESTS += $(DENSE_8)/baseline.csv
 DENSE_8_TESTS += $(DENSE_8)/fused.csv
 DENSE_8_TESTS += $(DENSE_8)/linalg.csv
 DENSE_8_TESTS += $(DENSE_8)/snrt.csv
-# DENSE_8_TESTS += $(DENSE_8)/snitch_stream.csv
+DENSE_8_TESTS += $(DENSE_8)/snitch_stream.csv
 # spill to j register...
 # DENSE_8_TESTS += $(DENSE_8)/scf_xdsl.csv
 
@@ -93,7 +93,7 @@ DSUM_8_16_TESTS += $(DSUM_8_16)/linalg.csv
 DSUM_8_16_TESTS += $(DSUM_8_16)/snrt.csv
 DSUM_8_16_TESTS += $(DSUM_8_16)/ssr1d.csv
 DSUM_8_16_TESTS += $(DSUM_8_16)/ssr2d.csv
-# DSUM_8_16_TESTS += $(DSUM_8_16)/snitch_stream.csv
+DSUM_8_16_TESTS += $(DSUM_8_16)/snitch_stream.csv
 DSUM_8_16_TESTS += $(DSUM_8_16)/scf_xdsl.csv
 
 $(DSUM_8_16)/tests.csv: $(DSUM_8_16_TESTS)
@@ -108,7 +108,7 @@ MATMUL_8 = matmul/8x8xf64
 MATMUL_8_TESTS =
 MATMUL_8_TESTS += $(MATMUL_8)/baseline.csv
 MATMUL_8_TESTS += $(MATMUL_8)/linalg.csv
-# MATMUL_8_TESTS += $(MATMUL_8)/snitch_stream.csv
+MATMUL_8_TESTS += $(MATMUL_8)/snitch_stream.csv
 MATMUL_8_TESTS += $(MATMUL_8)/snrt.csv
 MATMUL_8_TESTS += $(MATMUL_8)/scf_xdsl.csv
 
@@ -124,7 +124,7 @@ MAX_POOL_16 = pooling_nchw_max_d1_s2_3x3/1x1x16x16xf64
 MAX_POOL_16_TESTS =
 MAX_POOL_16_TESTS += $(MAX_POOL_16)/baseline.csv
 MAX_POOL_16_TESTS += $(MAX_POOL_16)/linalg.csv
-# MAX_POOL_16_TESTS += $(MAX_POOL_16)/snitch_stream.csv
+MAX_POOL_16_TESTS += $(MAX_POOL_16)/snitch_stream.csv
 MAX_POOL_16_TESTS += $(MAX_POOL_16)/snrt.csv
 # maxf renamed in MLIR 17
 # MAX_POOL_16_TESTS += $(MAX_POOL_16)/scf_xdsl.csv
@@ -141,7 +141,7 @@ SUM_POOL_16 = pooling_nchw_sum_d1_s2_3x3/1x1x16x16xf64
 SUM_POOL_16_TESTS =
 SUM_POOL_16_TESTS += $(SUM_POOL_16)/baseline.csv
 SUM_POOL_16_TESTS += $(SUM_POOL_16)/linalg.csv
-# SUM_POOL_16_TESTS += $(SUM_POOL_16)/snitch_stream.csv
+SUM_POOL_16_TESTS += $(SUM_POOL_16)/snitch_stream.csv
 SUM_POOL_16_TESTS += $(SUM_POOL_16)/snrt.csv
 SUM_POOL_16_TESTS += $(SUM_POOL_16)/scf_xdsl.csv
 
@@ -161,7 +161,7 @@ RELU_16_TESTS += $(RELU_16)/ssr_frep.csv
 RELU_16_TESTS += $(RELU_16)/snrt.csv
 RELU_16_TESTS += $(RELU_16)/linalg.csv
 # RELU_16_TESTS += $(RELU_16)/linalg_xdsl.csv
-# RELU_16_TESTS += $(RELU_16)/snitch_stream.csv
+RELU_16_TESTS += $(RELU_16)/snitch_stream.csv
 # maxf renamed in MLIR 17
 # RELU_16_TESTS += $(RELU_16)/scf_xdsl.csv
 
@@ -176,7 +176,7 @@ FILL_16 = fill/16x16xf64
 FILL_16_TESTS =
 FILL_16_TESTS += $(FILL_16)/baseline.csv
 FILL_16_TESTS += $(FILL_16)/linalg.csv
-# FILL_16_TESTS += $(FILL_16)/snitch_stream.csv
+FILL_16_TESTS += $(FILL_16)/snitch_stream.csv
 FILL_16_TESTS += $(FILL_16)/snrt.csv
 FILL_16_TESTS += $(FILL_16)/scf_xdsl.csv
 

kernels/conv2d_d1_s1_3x3/1x1x8x8xf64/snitch_stream.csv

@@ -0,0 +1 @@
+1499

kernels/conv2d_d1_s1_3x3/1x1x8x8xf64/snitch_stream.xdsl.mlir

@@ -26,7 +26,8 @@ riscv_func.func public @conv_2d_nchw_fchw_d1_s1_3x3(
     ^bb0(%X_stream : !stream.readable<!riscv.freg<ft0>>, %Y_stream : !stream.readable<!riscv.freg<ft1>>):
       %c288 = riscv.li 288 : () -> !riscv.reg<>
       riscv_scf.for %z_i : !riscv.reg<> = %c0 to %c288 step %c8 {
-        %c = riscv.fmv.d %zero_float : (!riscv.freg<>) -> !riscv.freg<>
+        %Z_dest = riscv.add %Z_moved, %z_i : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<>
+        %c = riscv.fld %Z_dest, 0 : (!riscv.reg<>) -> !riscv.freg<>
 
         %z = riscv_snitch.frep_outer %c8 iter_args(%acc = %c) -> (!riscv.freg<>) {
           %x = riscv_snitch.read from %X_stream : !riscv.freg<ft0>
@@ -35,7 +36,6 @@ riscv_func.func public @conv_2d_nchw_fchw_d1_s1_3x3(
           riscv_snitch.frep_yield %res : !riscv.freg<>
         }
 
-        %Z_dest = riscv.add %Z_moved, %z_i : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<>
         riscv.fsd %Z_dest, %z, 0 : (!riscv.reg<>, !riscv.freg<>) -> ()
 
         riscv_scf.yield

kernels/conv2d_d1_s1_3x3/1x1x8x8xf64/tests.csv

@@ -1,3 +1,4 @@
 baseline,1987
 linalg,2104
+snitch_stream,1499
 snrt,1486

kernels/conv2d_d1_s1_3x3/params.csv

@@ -1,3 +1,4 @@
 1x1x8x8xf64,baseline,1987
 1x1x8x8xf64,linalg,2104
+1x1x8x8xf64,snitch_stream,1499
 1x1x8x8xf64,snrt,1486

kernels/ddot/128xf64/snitch_stream.csv

@@ -0,0 +1 @@
+570

kernels/ddot/128xf64/tests.csv

@@ -1,5 +1,6 @@
 baseline,929
 linalg,1194
+snitch_stream,570
 snrt,550
 scf_xdsl,1582
 scf,1194

kernels/ddot/params.csv

@@ -1,5 +1,6 @@
 128xf64,baseline,929
 128xf64,linalg,1194
+128xf64,snitch_stream,570
 128xf64,snrt,550
 128xf64,scf_xdsl,1582
 128xf64,scf,1194

kernels/dense/8x8xf64/snitch_stream.csv

@@ -0,0 +1 @@
+2734

kernels/dense/8x8xf64/snitch_stream.xdsl.mlir

@@ -33,8 +33,8 @@ riscv.assembly_section ".text" {
     "snitch_stream.streaming_region"(%X_moved, %W_moved, %B_moved, %stride_pattern_0, %stride_pattern_1, %stride_pattern_2) <{"operandSegmentSizes" = array<i32: 3, 0, 3>}> ({
     ^bb0(%X_stream : !stream.readable<!riscv.freg<ft0>>, %W_stream : !stream.readable<!riscv.freg<ft1>>, %B_stream : !stream.readable<!riscv.freg<ft2>>):
       riscv_scf.for %y_i : !riscv.reg<> = %c0 to %c512 step %c8 {
-        %c = riscv.fmv.d %zero_float : (!riscv.freg<>) -> !riscv.freg<>
-
+        %Y_dest = riscv.add %Y_moved, %y_i : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<>
+        %c = riscv.fld %Y_dest, 0 : (!riscv.reg<>) -> !riscv.freg<>
 
         %c7 = riscv.li 7 : () -> !riscv.reg<>
         %dot = riscv_snitch.frep_outer %c7 iter_args(%acc = %c) -> (!riscv.freg<>) {
@@ -48,7 +48,6 @@ riscv.assembly_section ".text" {
         %y_0 = riscv.fadd.d %b, %dot : (!riscv.freg<ft2>, !riscv.freg<>) -> !riscv.freg<>
         %y_1 = riscv.fmax.d %y_0, %zero_float : (!riscv.freg<>, !riscv.freg<>) -> !riscv.freg<>
 
-        %Y_dest = riscv.add %Y_moved, %y_i : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<>
         riscv.fsd %Y_dest, %y_1, 0 : (!riscv.reg<>, !riscv.freg<>) -> ()
 
         riscv_scf.yield

kernels/dense/8x8xf64/tests.csv

@@ -2,3 +2,4 @@ baseline,3239
 fused,2964
 linalg,4494
 snrt,2709
+snitch_stream,2734

kernels/dense/params.csv

@@ -2,3 +2,4 @@
 8x8xf64,fused,2964
 8x8xf64,linalg,4494
 8x8xf64,snrt,2709
+8x8xf64,snitch_stream,2734

kernels/dsum/8x16xf32/snitch_stream.csv

@@ -0,0 +1 @@
+194

kernels/dsum/8x16xf32/tests.csv

@@ -3,4 +3,5 @@ linalg,794
 snrt,187
 ssr1d,253
 ssr2d,273
+snitch_stream,194
 scf_xdsl,3564

kernels/dsum/params.csv

@@ -3,4 +3,5 @@
 8x16xf32,snrt,187
 8x16xf32,ssr1d,253
 8x16xf32,ssr2d,273
+8x16xf32,snitch_stream,194
 8x16xf32,scf_xdsl,3564

kernels/fill/16x16xf64/snitch_stream.csv

@@ -0,0 +1 @@
+294

kernels/fill/16x16xf64/tests.csv

@@ -1,4 +1,5 @@
 baseline,370
 linalg,347
+snitch_stream,294
 snrt,299
 scf_xdsl,2676

kernels/fill/params.csv

@@ -1,4 +1,5 @@
 16x16xf64,baseline,370
 16x16xf64,linalg,347
+16x16xf64,snitch_stream,294
 16x16xf64,snrt,299
 16x16xf64,scf_xdsl,2676

kernels/kernels.csv

@@ -1,39 +1,48 @@
 conv2d_d1_s1_3x3,1x1x8x8xf64,baseline,1987
 conv2d_d1_s1_3x3,1x1x8x8xf64,linalg,2104
+conv2d_d1_s1_3x3,1x1x8x8xf64,snitch_stream,1499
 conv2d_d1_s1_3x3,1x1x8x8xf64,snrt,1486
 ddot,128xf64,baseline,929
 ddot,128xf64,linalg,1194
+ddot,128xf64,snitch_stream,570
 ddot,128xf64,snrt,550
 ddot,128xf64,scf_xdsl,1582
 ddot,128xf64,scf,1194
 dense,8x8xf64,baseline,3239
 dense,8x8xf64,fused,2964
 dense,8x8xf64,linalg,4494
 dense,8x8xf64,snrt,2709
+dense,8x8xf64,snitch_stream,2734
 dsum,8x16xf32,baseline,1202
 dsum,8x16xf32,linalg,794
 dsum,8x16xf32,snrt,187
 dsum,8x16xf32,ssr1d,253
 dsum,8x16xf32,ssr2d,273
+dsum,8x16xf32,snitch_stream,194
 dsum,8x16xf32,scf_xdsl,3564
 fill,16x16xf64,baseline,370
 fill,16x16xf64,linalg,347
+fill,16x16xf64,snitch_stream,294
 fill,16x16xf64,snrt,299
 fill,16x16xf64,scf_xdsl,2676
 matmul,8x8xf64,baseline,4229
 matmul,8x8xf64,linalg,3816
+matmul,8x8xf64,snitch_stream,2336
 matmul,8x8xf64,snrt,2304
 matmul,8x8xf64,scf_xdsl,21360
 pooling_nchw_max_d1_s2_3x3,1x1x16x16xf64,baseline,1435
 pooling_nchw_max_d1_s2_3x3,1x1x16x16xf64,linalg,1201
+pooling_nchw_max_d1_s2_3x3,1x1x16x16xf64,snitch_stream,1118
 pooling_nchw_max_d1_s2_3x3,1x1x16x16xf64,snrt,1094
 pooling_nchw_sum_d1_s2_3x3,1x1x16x16xf64,baseline,2096
 pooling_nchw_sum_d1_s2_3x3,1x1x16x16xf64,linalg,1948
+pooling_nchw_sum_d1_s2_3x3,1x1x16x16xf64,snitch_stream,2000
 pooling_nchw_sum_d1_s2_3x3,1x1x16x16xf64,snrt,1976
 pooling_nchw_sum_d1_s2_3x3,1x1x16x16xf64,scf_xdsl,24699
 relu,16x16xf64,baseline,1339
 relu,16x16xf64,ssr,846
 relu,16x16xf64,ssr_frep,327
 relu,16x16xf64,snrt,334
 relu,16x16xf64,linalg,1074
+relu,16x16xf64,snitch_stream,322
 softmax,16xf64,baseline,32611

kernels/matmul/8x8xf64/snitch_stream.csv

@@ -0,0 +1 @@
+2336

kernels/matmul/8x8xf64/tests.csv

@@ -1,4 +1,5 @@
 baseline,4229
 linalg,3816
+snitch_stream,2336
 snrt,2304
 scf_xdsl,21360

kernels/matmul/params.csv

@@ -1,4 +1,5 @@
 8x8xf64,baseline,4229
 8x8xf64,linalg,3816
+8x8xf64,snitch_stream,2336
 8x8xf64,snrt,2304
 8x8xf64,scf_xdsl,21360

kernels/pivoted.csv

@@ -1,11 +1,11 @@
-kernels,baseline,linalg,scf_xdsl,snrt,min_llvm_mlir
-conv2d_d1_s1_3x3 1x1x8x8xf64,1987,2104,,1486,1987
-ddot 128xf64,929,1194,1582,550,929
-dense 8x8xf64,3239,4494,,2709,3239
-dsum 8x16xf32,1202,794,3564,187,794
-fill 16x16xf64,370,347,2676,299,347
-matmul 8x8xf64,4229,3816,21360,2304,3816
-pooling_nchw_max_d1_s2_3x3 1x1x16x16xf64,1435,1201,,1094,1201
-pooling_nchw_sum_d1_s2_3x3 1x1x16x16xf64,2096,1948,24699,1976,1948
-relu 16x16xf64,1339,1074,,334,1074
-softmax 16xf64,32611,,,,32611
+kernels,baseline,linalg,scf_xdsl,snitch_stream,snrt,min_llvm_mlir
+conv2d_d1_s1_3x3 1x1x8x8xf64,1987,2104,,1499,1486,1987
+ddot 128xf64,929,1194,1582,570,550,929
+dense 8x8xf64,3239,4494,,2734,2709,3239
+dsum 8x16xf32,1202,794,3564,194,187,794
+fill 16x16xf64,370,347,2676,294,299,347
+matmul 8x8xf64,4229,3816,21360,2336,2304,3816
+pooling_nchw_max_d1_s2_3x3 1x1x16x16xf64,1435,1201,,1118,1094,1201
+pooling_nchw_sum_d1_s2_3x3 1x1x16x16xf64,2096,1948,24699,2000,1976,1948
+relu 16x16xf64,1339,1074,,322,334,1074
+softmax 16xf64,32611,,,,,32611

kernels/pooling_nchw_max_d1_s2_3x3/1x1x16x16xf64/snitch_stream.csv

@@ -0,0 +1 @@
+1118

kernels/pooling_nchw_max_d1_s2_3x3/1x1x16x16xf64/snitch_stream.xdsl.mlir

@@ -1,7 +1,3 @@
-riscv.assembly_section ".data" {
-  riscv.label ".min_val"
-  riscv.directive ".quad" "0xc0c3880000000000" {"comment" = "double -1.0E+4"}
-}
 riscv.assembly_section ".text" {
   riscv.directive ".globl" "pooling_nchw_max_d1_s2_3x3"
   riscv.directive ".p2align" "2"
@@ -20,23 +16,21 @@ riscv_func.func public @pooling_nchw_max_d1_s2_3x3(
     %c8 = riscv.li 8 : () -> !riscv.reg<>
     %c512 = riscv.li 512 : () -> !riscv.reg<>
 
-    %min_val = riscv.fld %c0, ".min_val" : (!riscv.reg<zero>) -> !riscv.freg<>
-
     %stride_pattern_0 = "snitch_stream.stride_pattern"() {"ub" = [#builtin.int<3>, #builtin.int<3>, #builtin.int<7>, #builtin.int<7>], "strides" = [#builtin.int<8>, #builtin.int<128>, #builtin.int<16>, #builtin.int<256>], "dm" = #builtin.int<0>} : () -> !snitch_stream.stride_pattern_type<4>
 
     "snitch_stream.streaming_region"(%X_moved, %stride_pattern_0) <{"operandSegmentSizes" = array<i32: 1, 0, 1>}> ({
     ^bb0(%X_stream : !stream.readable<!riscv.freg<ft0>>, %Y_stream : !stream.readable<!riscv.freg<ft1>>):
       %c392 = riscv.li 392 : () -> !riscv.reg<>
       riscv_scf.for %y_i : !riscv.reg<> = %c0 to %c392 step %c8 {
-        %init = riscv.fmv.d %min_val : (!riscv.freg<>) -> !riscv.freg<>
+        %Y_dest = riscv.add %Y_moved, %y_i : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<>
+        %init = riscv.fld %Y_dest, 0 : (!riscv.reg<>) -> !riscv.freg<>
 
         %y = riscv_snitch.frep_outer %c8 iter_args(%acc = %init) -> (!riscv.freg<>) {
           %x = riscv_snitch.read from %X_stream : !riscv.freg<ft0>
           %res = riscv.fmax.d %x, %acc : (!riscv.freg<ft0>, !riscv.freg<>) -> !riscv.freg<>
           riscv_snitch.frep_yield %res : !riscv.freg<>
         }
 
-        %Y_dest = riscv.add %Y_moved, %y_i : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<>
         riscv.fsd %Y_dest, %y, 0 : (!riscv.reg<>, !riscv.freg<>) -> ()
 
         riscv_scf.yield

kernels/pooling_nchw_max_d1_s2_3x3/1x1x16x16xf64/tests.csv

@@ -1,3 +1,4 @@
 baseline,1435
 linalg,1201
+snitch_stream,1118
 snrt,1094

kernels/pooling_nchw_max_d1_s2_3x3/params.csv

@@ -1,3 +1,4 @@
 1x1x16x16xf64,baseline,1435
 1x1x16x16xf64,linalg,1201
+1x1x16x16xf64,snitch_stream,1118
 1x1x16x16xf64,snrt,1094

kernels/pooling_nchw_sum_d1_s2_3x3/1x1x16x16xf64/snitch_stream.csv

@@ -0,0 +1 @@
+2000

kernels/pooling_nchw_sum_d1_s2_3x3/1x1x16x16xf64/snitch_stream.xdsl.mlir

@@ -16,23 +16,21 @@ riscv_func.func public @pooling_nchw_sum_d1_s2_3x3(
     %c8 = riscv.li 8 : () -> !riscv.reg<>
     %c512 = riscv.li 512 : () -> !riscv.reg<>
 
-    %zero_float = riscv.fcvt.d.w %c0 : (!riscv.reg<zero>) -> !riscv.freg<>
-
     %stride_pattern_0 = "snitch_stream.stride_pattern"() {"ub" = [#builtin.int<3>, #builtin.int<3>, #builtin.int<7>, #builtin.int<7>], "strides" = [#builtin.int<8>, #builtin.int<128>, #builtin.int<16>, #builtin.int<256>], "dm" = #builtin.int<0>} : () -> !snitch_stream.stride_pattern_type<4>
 
     "snitch_stream.streaming_region"(%X_moved, %stride_pattern_0) <{"operandSegmentSizes" = array<i32: 1, 0, 1>}> ({
     ^bb0(%X_stream : !stream.readable<!riscv.freg<ft0>>, %Y_stream : !stream.readable<!riscv.freg<ft1>>):
       %c392 = riscv.li 392 : () -> !riscv.reg<>
       riscv_scf.for %y_i : !riscv.reg<> = %c0 to %c392 step %c8 {
-        %init = riscv.fmv.d %zero_float : (!riscv.freg<>) -> !riscv.freg<>
+        %Y_dest = riscv.add %Y_moved, %y_i : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<>
+        %init = riscv.fld %Y_dest, 0 : (!riscv.reg<>) -> !riscv.freg<>
 
         %y = riscv_snitch.frep_outer %c8 iter_args(%acc = %init) -> (!riscv.freg<>) {
           %x = riscv_snitch.read from %X_stream : !riscv.freg<ft0>
           %res = riscv.fadd.d %x, %acc : (!riscv.freg<ft0>, !riscv.freg<>) -> !riscv.freg<>
           riscv_snitch.frep_yield %res : !riscv.freg<>
         }
 
-        %Y_dest = riscv.add %Y_moved, %y_i : (!riscv.reg<>, !riscv.reg<>) -> !riscv.reg<>
         riscv.fsd %Y_dest, %y, 0 : (!riscv.reg<>, !riscv.freg<>) -> ()
 
         riscv_scf.yield

kernels/pooling_nchw_sum_d1_s2_3x3/1x1x16x16xf64/tests.csv

@@ -1,4 +1,5 @@
 baseline,2096
 linalg,1948
+snitch_stream,2000
 snrt,1976
 scf_xdsl,24699

kernels/pooling_nchw_sum_d1_s2_3x3/params.csv

@@ -1,4 +1,5 @@
 1x1x16x16xf64,baseline,2096
 1x1x16x16xf64,linalg,1948
+1x1x16x16xf64,snitch_stream,2000
 1x1x16x16xf64,snrt,1976
 1x1x16x16xf64,scf_xdsl,24699

kernels/relu/16x16xf64/snitch_stream.csv

@@ -0,0 +1 @@
+322

kernels/relu/16x16xf64/tests.csv

@@ -3,3 +3,4 @@ ssr,846
 ssr_frep,327
 snrt,334
 linalg,1074
+snitch_stream,322

kernels/relu/params.csv

@@ -3,3 +3,4 @@
 16x16xf64,ssr_frep,327
 16x16xf64,snrt,334
 16x16xf64,linalg,1074
+16x16xf64,snitch_stream,322