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core 68k, fix cyclone code execution from overlaid rom (sram/megasd)
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irixxxx committed Dec 23, 2024
1 parent a0ddd24 commit 3bbce62
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Showing 3 changed files with 15 additions and 6 deletions.
2 changes: 1 addition & 1 deletion pico/cart.c
Original file line number Diff line number Diff line change
Expand Up @@ -828,7 +828,7 @@ int PicoCartInsert(unsigned char *rom, unsigned int romsize, const char *carthw_
// This will hang the emu, but will prevent nasty crashes.
// note: 4 bytes are padded to every ROM
if (rom != NULL)
*(u32 *)(rom+romsize) = CPU_BE2(0x4EFAFFFE);
*(u32 *)(rom+romsize) = CPU_BE2(0x6000FFFE);

Pico.rom=rom;
Pico.romsize=romsize;
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1 change: 0 additions & 1 deletion pico/m68kif_cyclone.s
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,6 @@ crashed:
stmfd sp!,{lr}
mov r1, r7
bl cyclone_crashed
ldr r0, [r7, #0x40] @ reload PC + membase
ldmfd sp!,{pc}


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18 changes: 14 additions & 4 deletions pico/memory.c
Original file line number Diff line number Diff line change
Expand Up @@ -294,12 +294,22 @@ void log_io(unsigned int addr, int bits, int rw);
#endif

#if defined(EMU_C68K)
void cyclone_crashed(u32 pc, struct Cyclone *context)
u32 cyclone_crashed(u32 pc, struct Cyclone *context)
{
elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",
context == &PicoCpuCM68k ? 'm' : 's', pc);
// check for underlying ROM, in case of on-cart hw overlaying part of ROM
// NB assumes code isn't executed from the overlay, but I've never seen this
u32 pc24 = pc & 0xffffff;
if (pc24 >= Pico.romsize) {
// no ROM, so it's probably an illegal access
pc24 = Pico.romsize;
elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",
context == &PicoCpuCM68k ? 'm' : 's', pc);
}

context->membase = (u32)Pico.rom;
context->pc = (u32)Pico.rom + Pico.romsize;
context->pc = (u32)Pico.rom + pc24;

return context->pc;
}
#endif

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