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Merge pull request #280 from liorkhe/master
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Update inference_rules for network division
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mrasquinha-g authored Aug 8, 2023
2 parents c32c6f2 + 6306e23 commit 1f57122
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2 changes: 1 addition & 1 deletion inference_rules.adoc
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Expand Up @@ -487,7 +487,7 @@ Examples of forbidden bus interconnect include: PCIe/CXL/CCIX, Hypertransport, N

Additionally, any interconnect not listed in the permitted list is forbidden unless clearance is first obtained from the MLPerf Inference WG.

The SUT and QDL must run on physically separate and distinct systems. The SUT can contain multiple Nodes.
System Topology: The SUT and QDL must run on physically separate and distinct systems. The SUT can contain multiple Nodes. The systems can be connected point to point or through network elements like switches.

Fabric and protocol must be reported in the submission metadata. Submission metadata must be sufficient to determine OSI layers one through four of the submission's network stack.

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