forked from thesofproject/sof
-
Notifications
You must be signed in to change notification settings - Fork 1
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
topology1: sof-hda-generic: enable Waves playback
Create eq_iir + waves pipeline: pipe-eq-iir-waves-codec-playback.m4 and enable this pipeline on HDA0 for speaker/headphone playaback. HDA0.OUT dai pipeline is included for codec adapter widget connection. Signed-off-by: Mac Chiang <[email protected]>
- Loading branch information
Showing
3 changed files
with
133 additions
and
5 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
122 changes: 122 additions & 0 deletions
122
tools/topology/topology1/sof/pipe-eq-iir-waves-codec-playback.m4
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,122 @@ | ||
| # Low Latency Passthrough with EQIIR and Waves codec Pipeline | ||
| # | ||
| # Pipeline Endpoints for connection are : | ||
| # | ||
| # host PCM_P -- B0 --> EQIIR0 -> B1 --> Waves -- B2 --> sink DAI0 | ||
| # | | ||
|
|
||
| DECLARE_SOF_RT_UUID("Waves codec", waves_codec_uuid, 0xd944281a, 0xafe9, | ||
| 0x4695, 0xa0, 0x43, 0xd7, 0xf6, 0x2b, 0x89, 0x53, 0x8e); | ||
| define(`CA_UUID', waves_codec_uuid) | ||
|
|
||
| # Include topology builder | ||
| include(`utils.m4') | ||
| include(`buffer.m4') | ||
| include(`pcm.m4') | ||
| include(`pga.m4') | ||
| include(`bytecontrol.m4') | ||
| include(`dai.m4') | ||
| include(`pipeline.m4') | ||
| include(`codec_adapter.m4') | ||
| include(`eq_iir.m4') | ||
|
|
||
| ifelse(PLATFORM, `tgl', ` | ||
| define(SETUP_PARAMS_NAME, `MaxxChrome Setup' PIPELINE_ID)', ` | ||
| define(SETUP_PARAMS_NAME, `Waves Codec Setup' PIPELINE_ID)') | ||
|
|
||
| CONTROLBYTES_PRIV(PP_SETUP_CONFIG, | ||
| ` bytes "0x53,0x4f,0x46,0x00,' | ||
| ` 0x00,0x00,0x00,0x00,' | ||
| ` 0x0c,0x00,0x00,0x00,' | ||
| ` 0x00,0x10,0x00,0x03,' | ||
| ` 0x00,0x00,0x00,0x00,' | ||
| ` 0x00,0x00,0x00,0x00,' | ||
| ` 0x00,0x00,0x00,0x00,' | ||
| ` 0x00,0x00,0x00,0x00,' | ||
| ` 0x00,0x00,0x00,0x00,' | ||
| ` 0x0c,0x00,0x00,0x00,' | ||
| ` 0x00,0x00,0x00,0x00"' | ||
| ) | ||
|
|
||
| # Post process Bytes control for setup config | ||
| C_CONTROLBYTES(SETUP_PARAMS_NAME, PIPELINE_ID, | ||
| CONTROLBYTES_OPS(bytes), | ||
| CONTROLBYTES_EXTOPS(void, 258, 258), | ||
| , , , | ||
| CONTROLBYTES_MAX(, 8192), | ||
| , | ||
| PP_SETUP_CONFIG) | ||
|
|
||
| # | ||
| # EQIIR | ||
| # | ||
| define(DEF_EQIIR_COEF, concat(`eqiir_coef_', PIPELINE_ID)) | ||
| define(DEF_EQIIR_PRIV, concat(`eqiir_priv_', PIPELINE_ID)) | ||
|
|
||
| # define filter. eq_iir_coef_flat.m4 is set by default | ||
| ifdef(`PIPELINE_FILTER1', , `define(PIPELINE_FILTER1, eq_iir_coef_flat.m4)') | ||
| include(PIPELINE_FILTER1) | ||
|
|
||
| # EQ Bytes control with max value of 255 | ||
| C_CONTROLBYTES(DEF_EQIIR_COEF, PIPELINE_ID, | ||
| CONTROLBYTES_OPS(bytes, 258 binds the mixer control to bytes get/put handlers, 258, 258), | ||
| CONTROLBYTES_EXTOPS(258 binds the mixer control to bytes get/put handlers, 258, 258), | ||
| , , , | ||
| CONTROLBYTES_MAX(, 1024), | ||
| , | ||
| DEF_EQIIR_PRIV) | ||
|
|
||
| # | ||
| # Components and Buffers | ||
| # | ||
|
|
||
| # Host "Low latency Playback" PCM | ||
| # with 2 sink and 0 source periods | ||
| W_PCM_PLAYBACK(PCM_ID, Low Latency Playback, 2, 0, SCHEDULE_CORE) | ||
|
|
||
| W_CODEC_ADAPTER(0, PIPELINE_FORMAT, DAI_PERIODS, DAI_PERIODS, SCHEDULE_CORE, | ||
| LIST(` ', "SETUP_PARAMS_NAME")) | ||
|
|
||
| # "EQIIR0" has 2 sink period and 2 source periods | ||
| W_EQ_IIR(0, PIPELINE_FORMAT, 2, 2, SCHEDULE_CORE, | ||
| LIST(` ', "DEF_EQIIR_COEF")) | ||
|
|
||
| # Low Latency Buffers | ||
| W_BUFFER(0, COMP_BUFFER_SIZE(2, | ||
| COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), | ||
| PLATFORM_HOST_MEM_CAP) | ||
| W_BUFFER(1, COMP_BUFFER_SIZE(2, | ||
| COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), | ||
| PLATFORM_COMP_MEM_CAP) | ||
| W_BUFFER(2, COMP_BUFFER_SIZE(DAI_PERIODS, | ||
| COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), | ||
| PLATFORM_COMP_MEM_CAP) | ||
|
|
||
| # | ||
| # Pipeline Graph | ||
| # | ||
| # host PCM_P --> B0 --> EQ_IIR 0 --> B1 --> Waves Codec --> B2 --> sink DAI0 | ||
|
|
||
| P_GRAPH(pipe-eq-iir-waves-codec-playback, PIPELINE_ID, | ||
| LIST(` ', | ||
| `dapm(N_BUFFER(0), N_PCMP(PCM_ID))', | ||
| `dapm(N_EQ_IIR(0), N_BUFFER(0))', | ||
| `dapm(N_BUFFER(1), N_EQ_IIR(0))', | ||
| `dapm(N_CODEC_ADAPTER(0), N_BUFFER(1))', | ||
| `dapm(N_BUFFER(2), N_CODEC_ADAPTER(0))')) | ||
|
|
||
| # | ||
| # Pipeline Source and Sinks | ||
| # | ||
| indir(`define', concat(`PIPELINE_SOURCE_', PIPELINE_ID), N_BUFFER(2)) | ||
| indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), Low Latency Playback PCM_ID) | ||
|
|
||
| # | ||
| # PCM Configuration | ||
| # | ||
|
|
||
| # PCM capabilities supported by FW | ||
| PCM_CAPABILITIES(Low Latency Playback PCM_ID, CAPABILITY_FORMAT_NAME(PIPELINE_FORMAT), 48000, 48000, 2, PIPELINE_CHANNELS, 2, 16, 192, 16384, 65536, 65536) | ||
|
|
||
| undefine(`DEF_EQIIR_COEF') | ||
| undefine(`DEF_EQIIR_PRIV') |