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MRET to Supervisor Mode
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lupyuen committed Jan 19, 2024
1 parent e2fee46 commit e62d49f
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Showing 2 changed files with 9 additions and 3 deletions.
4 changes: 2 additions & 2 deletions riscv_cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ void print_console(void *machine0, const char *buf, int len);
#define DUMP_INTERRUPTS
#define DUMP_INVALID_CSR
#define DUMP_EXCEPTIONS
//#define DUMP_CSR
#define DUMP_CSR
#define CONFIG_LOGFILE

#include "riscv_cpu_priv.h"
Expand Down Expand Up @@ -1141,7 +1141,7 @@ static void raise_exception2(RISCVCPUState *s, uint32_t cause,
s->pc = s->mtvec;
}
//// Begin Test: Quit if cause=2, otherwise it will loop forever
if (cause == 2) { puts("tinyemu: Unknown mcause 2, quitting"); exit(1); }
// if (cause == 2) { puts("tinyemu: Unknown mcause 2, quitting"); exit(1); }
//// End Test
}

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8 changes: 7 additions & 1 deletion riscv_machine.c
Original file line number Diff line number Diff line change
Expand Up @@ -867,7 +867,13 @@ static void copy_bios(RISCVMachine *s, const uint8_t *buf, int buf_len,
q[1] = 0x597; /* auipc a1, dtb */
q[2] = 0x58593 + ((fdt_addr - 4) << 20); /* addi a1, a1, dtb */
q[3] = 0xf1402573; /* csrr a0, mhartid */
q[4] = 0x00028067; /* jalr zero, t0, jump_addr */

//// Previously: Jump to RAM_BASE_ADDR in Machine Mode
// q[4] = 0x00028067; /* jalr zero, t0, jump_addr */

//// Jump to RAM_BASE_ADDR in Supervisor Mode
q[4] = 0x34129073; // csrw mepc, t0
q[5] = 0x30200073; // mret
}

static void riscv_flush_tlb_write_range(void *opaque, uint8_t *ram_addr,
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