Regularly trigger the Supervisor-Mode Timer Interrupt

lupyuen · Jan 23, 2024 · ddedb86 · ddedb86
1 parent 1bcf19a
commit ddedb86
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Showing 2 changed files with 4 additions and 2 deletions.
diff --git a/riscv_cpu.c b/riscv_cpu.c
@@ -407,8 +407,6 @@ int target_read_slow(RISCVCPUState *s, mem_uint_t *pval,
                 char read_input(void);
                 ret = read_input();
 
-                if (ret == 'a') { riscv_cpu_set_mip(s, MIP_STIP); }////
-
                 // Clear the Input Buffer
                 void set_input(char ch);
                 set_input(0);

diff --git a/riscv_machine.c b/riscv_machine.c
@@ -1139,6 +1139,10 @@ static int riscv_machine_get_sleep_duration(VirtMachine *s1, int delay)
     }
     if (!riscv_cpu_get_power_down(s))
         delay = 0;
+
+    //// Begin Test: Trigger the Supervisor-Mode Timer Interrupt
+    static uint64_t t = 0; if (t++ % 100 == 0) { riscv_cpu_set_mip(s, MIP_STIP); } ////
+    //// End Test
     return delay;
 }