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add nan_boxing
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fixes d0iasm#32 (comment)
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@lenawanel
lenawanel committed May 29, 2024
1 parent acc3a5c commit 60155c9
Showing 1 changed file with 72 additions and 49 deletions.
121 changes: 72 additions & 49 deletions src/cpu.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -2500,11 +2500,12 @@ impl Cpu {
inst_count!(self, "fmadd.s");
self.debug(inst, "fmadd.s");

self.fregs.write(
self.fregs.write_nanboxed(
rd,
(self.fregs.read(rs1) as f32)
.mul_add(self.fregs.read(rs2) as f32, self.fregs.read(rs3) as f32)
as f64,
(self.fregs.read_nanboxed(rs1)).mul_add(
self.fregs.read_nanboxed(rs2) ,
self.fregs.read_nanboxed(rs3) ,
),
);
}
0x1 => {
Expand Down Expand Up @@ -2535,11 +2536,12 @@ impl Cpu {
inst_count!(self, "fmsub.s");
self.debug(inst, "fmsub.s");

self.fregs.write(
self.fregs.write_nanboxed(
rd,
(self.fregs.read(rs1) as f32)
.mul_add(self.fregs.read(rs2) as f32, -self.fregs.read(rs3) as f32)
as f64,
self.fregs.read_nanboxed(rs1).mul_add(
self.fregs.read_nanboxed(rs2),
-self.fregs.read_nanboxed(rs3),
),
);
}
0x1 => {
Expand Down Expand Up @@ -2570,11 +2572,12 @@ impl Cpu {
inst_count!(self, "fnmadd.s");
self.debug(inst, "fnmadd.s");

self.fregs.write(
self.fregs.write_nanboxed(
rd,
(-self.fregs.read(rs1) as f32)
.mul_add(self.fregs.read(rs2) as f32, self.fregs.read(rs3) as f32)
as f64,
(-self.fregs.read_nanboxed(rs1)).mul_add(
self.fregs.read_nanboxed(rs2),
self.fregs.read_nanboxed(rs3),
),
);
}
0x1 => {
Expand Down Expand Up @@ -2604,11 +2607,12 @@ impl Cpu {
inst_count!(self, "fnmsub.s");
self.debug(inst, "fnmsub.s");

self.fregs.write(
self.fregs.write_nanboxed(
rd,
(-self.fregs.read(rs1) as f32)
.mul_add(self.fregs.read(rs2) as f32, -self.fregs.read(rs3) as f32)
as f64,
(-self.fregs.read_nanboxed(rs1)).mul_add(
self.fregs.read_nanboxed(rs2),
-self.fregs.read_nanboxed(rs3),
),
);
}
0x1 => {
Expand All @@ -2630,7 +2634,6 @@ impl Cpu {
0x53 => {
// RV32F and RV64F
// TODO: support the rounding mode encoding (rm).
// TODO: NaN Boxing of Narrower Values (Spec 12.2).
// TODO: set exception flags.

/*
Expand Down Expand Up @@ -2662,9 +2665,9 @@ impl Cpu {
inst_count!(self, "fadd.s");
self.debug(inst, "fadd.s");

self.fregs.write(
self.fregs.write_nanboxed(
rd,
(self.fregs.read(rs1) as f32 + self.fregs.read(rs2) as f32) as f64,
self.fregs.read_nanboxed(rs1) + self.fregs.read_nanboxed(rs2),
)
}
0x01 => {
Expand All @@ -2680,9 +2683,9 @@ impl Cpu {
inst_count!(self, "fsub.s");
self.debug(inst, "fsub.s");

self.fregs.write(
self.fregs.write_nanboxed(
rd,
(self.fregs.read(rs1) as f32 - self.fregs.read(rs2) as f32) as f64,
self.fregs.read_nanboxed(rs1) - self.fregs.read_nanboxed(rs2),
)
}
0x05 => {
Expand All @@ -2698,9 +2701,9 @@ impl Cpu {
inst_count!(self, "fmul.s");
self.debug(inst, "fmul.s");

self.fregs.write(
self.fregs.write_nanboxed(
rd,
(self.fregs.read(rs1) as f32 * self.fregs.read(rs2) as f32) as f64,
self.fregs.read_nanboxed(rs1) * self.fregs.read_nanboxed(rs2),
)
}
0x09 => {
Expand All @@ -2716,9 +2719,9 @@ impl Cpu {
inst_count!(self, "fdiv.s");
self.debug(inst, "fdiv.s");

self.fregs.write(
self.fregs.write_nanboxed(
rd,
(self.fregs.read(rs1) as f32 / self.fregs.read(rs2) as f32) as f64,
self.fregs.read_nanboxed(rs1) / self.fregs.read_nanboxed(rs2),
)
}
0x0d => {
Expand All @@ -2736,29 +2739,35 @@ impl Cpu {
inst_count!(self, "fsgnj.s");
self.debug(inst, "fsgnj.s");

self.fregs
.write(rd, self.fregs.read(rs1).copysign(self.fregs.read(rs2)));
self.fregs.write_nanboxed(
rd,
self.fregs
.read_nanboxed(rs1)
.copysign(self.fregs.read_nanboxed(rs2)),
);
}
0x1 => {
// fsgnjn.s
inst_count!(self, "fsgnjn.s");
self.debug(inst, "fsgnjn.s");

self.fregs.write(
self.fregs.write_nanboxed(
rd,
self.fregs.read(rs1).copysign(-self.fregs.read(rs2)),
self.fregs
.read_nanboxed(rs1)
.copysign(-self.fregs.read_nanboxed(rs2)),
);
}
0x2 => {
// fsgnjx.s
inst_count!(self, "fsgnjx.s");
self.debug(inst, "fsgnjx.s");

let sign1 = (self.fregs.read(rs1) as f32).to_bits() & 0x80000000;
let sign2 = (self.fregs.read(rs2) as f32).to_bits() & 0x80000000;
let other = (self.fregs.read(rs1) as f32).to_bits() & 0x7fffffff;
let sign1 = self.fregs.read_nanboxed(rs1).to_bits() & 0x80000000;
let sign2 = self.fregs.read_nanboxed(rs2).to_bits() & 0x80000000;
let other = self.fregs.read_nanboxed(rs1).to_bits() & 0x7fffffff;
self.fregs
.write(rd, f32::from_bits((sign1 ^ sign2) | other) as f64);
.write_nanboxed(rd, f32::from_bits((sign1 ^ sign2) | other));
}
_ => {
return Err(Exception::IllegalInstruction(inst));
Expand Down Expand Up @@ -2808,16 +2817,24 @@ impl Cpu {
inst_count!(self, "fmin.s");
self.debug(inst, "fmin.s");

self.fregs
.write(rd, self.fregs.read(rs1).min(self.fregs.read(rs2)));
self.fregs.write_nanboxed(
rd,
self.fregs
.read_nanboxed(rs1)
.min(self.fregs.read_nanboxed(rs2)),
);
}
0x1 => {
// fmax.s
inst_count!(self, "fmax.s");
self.debug(inst, "fmax.s");

self.fregs
.write(rd, self.fregs.read(rs1).max(self.fregs.read(rs2)));
self.fregs.write_nanboxed(
rd,
self.fregs
.read_nanboxed(rs1)
.max(self.fregs.read_nanboxed(rs2)),
);
}
_ => {
return Err(Exception::IllegalInstruction(inst));
Expand Down Expand Up @@ -2885,7 +2902,9 @@ impl Cpu {

self.xregs.write(
rd,
if self.fregs.read(rs1) <= self.fregs.read(rs2) {
if self.fregs.read_nanboxed(rs1)
<= self.fregs.read_nanboxed(rs2)
{
1
} else {
0
Expand All @@ -2899,7 +2918,8 @@ impl Cpu {

self.xregs.write(
rd,
if self.fregs.read(rs1) < self.fregs.read(rs2) {
if self.fregs.read_nanboxed(rs1) < self.fregs.read_nanboxed(rs2)
{
1
} else {
0
Expand All @@ -2913,7 +2933,9 @@ impl Cpu {

self.xregs.write(
rd,
if self.fregs.read(rs1) == self.fregs.read(rs2) {
if self.fregs.read_nanboxed(rs1)
== self.fregs.read_nanboxed(rs2)
{
1
} else {
0
Expand Down Expand Up @@ -2983,7 +3005,7 @@ impl Cpu {

self.xregs.write(
rd,
((self.fregs.read(rs1) as f32).round() as i32) as u64,
(self.fregs.read_nanboxed(rs1).round() as i32) as u64,
);
}
0x1 => {
Expand All @@ -2993,7 +3015,7 @@ impl Cpu {

self.xregs.write(
rd,
(((self.fregs.read(rs1) as f32).round() as u32) as i32) as u64,
((self.fregs.read_nanboxed(rs1).round() as u32) as i32) as u64,
);
}
0x2 => {
Expand All @@ -3002,15 +3024,15 @@ impl Cpu {
self.debug(inst, "fcvt.l.s");

self.xregs
.write(rd, (self.fregs.read(rs1) as f32).round() as u64);
.write(rd, self.fregs.read_nanboxed(rs1).round() as u64);
}
0x3 => {
// fcvt.lu.s
inst_count!(self, "fcvt.lu.s");
self.debug(inst, "fcvt.lu.s");

self.xregs
.write(rd, (self.fregs.read(rs1) as f32).round() as u64);
.write(rd, self.fregs.read_nanboxed(rs1).round() as u64);
}
_ => {
return Err(Exception::IllegalInstruction(inst));
Expand Down Expand Up @@ -3064,30 +3086,31 @@ impl Cpu {
self.debug(inst, "fcvt.s.w");

self.fregs
.write(rd, ((self.xregs.read(rs1) as i32) as f32) as f64);
.write_nanboxed(rd, (self.xregs.read(rs1) as i32) as f32);
}
0x1 => {
// fcvt.s.wu
inst_count!(self, "fcvt.s.wu");
self.debug(inst, "fcvt.s.wu");

self.fregs
.write(rd, ((self.xregs.read(rs1) as u32) as f32) as f64);
.write_nanboxed(rd, (self.xregs.read(rs1) as u32) as f32);
}
0x2 => {
// fcvt.s.l
inst_count!(self, "fcvt.s.l");
self.debug(inst, "fcvt.s.l");

self.fregs.write(rd, (self.xregs.read(rs1) as f32) as f64);
self.fregs
.write_nanboxed(rd, self.xregs.read(rs1) as i64 as f32);
}
0x3 => {
// fcvt.s.lu
inst_count!(self, "fcvt.s.lu");
self.debug(inst, "fcvt.s.lu");

self.fregs
.write(rd, ((self.xregs.read(rs1) as u64) as f32) as f64);
.write_nanboxed(rd, (self.xregs.read(rs1) as u64) as f32);
}
_ => {
return Err(Exception::IllegalInstruction(inst));
Expand Down Expand Up @@ -3147,7 +3170,7 @@ impl Cpu {
inst_count!(self, "fclass.s");
self.debug(inst, "fclass.s");

let f = self.fregs.read(rs1);
let f = self.fregs.read_nanboxed(rs1);
match f.classify() {
FpCategory::Infinite => {
self.xregs
Expand Down

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