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[xegpu-to-vc-func] Is Further information is requested
transpose_bit_width=16
supported?
question
#895
opened Sep 25, 2024 by
dchigarev
[XeGPU]
xegpu-to-vc-func
pass ignores constant offsets of xegpu.update_nd_offset
#815
opened Jul 30, 2024 by
dchigarev
TEST 'IMEX :: Integration/Dialect/XeGPU/gemm_4kx4kx4k_f16_f16_f16_w_8x32xf16_stores.mlir' FAILED
#682
opened Feb 21, 2024 by
chsasank
Auto-inserted deallocation of GPU memory leads to crash
bug
Something isn't working
#664
opened Oct 18, 2023 by
fschlimb
Checking Test Suite Gives error: failed to legalize operation 'xegpu.load_2d'
#661
opened Sep 9, 2023 by
Scarlet1ssimo
[Triton] Triton generated kernel cannot be load correctly thru the L0 API.
#659
opened Jul 19, 2023 by
chengjunlu
Spirv.ConstantOp does not support lowering from arith.ConstantOp with bf16
#657
opened Jul 11, 2023 by
Stonepia
Add dynamic shape handling for GPU to SPIRV lowering.
enhancement
New feature or request
#653
opened Jun 6, 2023 by
silee2
The GPUBarrierConversion is not align to the SPIRV memory model
#649
opened May 13, 2023 by
chengjunlu
It seems the SPIRV serialization has issue in translating the block parameter (SSA in MLIR) into the Phi node (SSA in SPIRV IR)
Triton
Issues tracking Triton/IMEX collaboration
#646
opened May 4, 2023 by
chengjunlu
Add function decoration FuncParamAttr support in SPIRV dialect.
Triton
Issues tracking Triton/IMEX collaboration
#645
opened Apr 27, 2023 by
chengjunlu
To support user to define a global string in SPIRV dialect.
spirv_debug_support
Triton
Issues tracking Triton/IMEX collaboration
#642
opened Apr 24, 2023 by
chengjunlu
Support the x1 vector data type support for easy to use
Triton
Issues tracking Triton/IMEX collaboration
#641
opened Apr 24, 2023 by
chengjunlu
Add documentation for imex-runner.py and pass pipeline file syntax
documentation
Improvements or additions to documentation
#539
opened Nov 30, 2022 by
silee2
Index lowering failure in upstream ArithToSpirv
bug
Something isn't working
CORE_MLIR_COMPILER
#534
opened Nov 28, 2022 by
mdvoretc-intel
Sycl vs level zero runtime pros & cons
CORE_MLIR_COMPILER
performance
#508
opened Nov 21, 2022 by
nbpatel
Convert linalg.generic to linalg.matmul
CORE_MLIR_COMPILER
enhancement
New feature or request
#489
opened Nov 18, 2022 by
mshahneo
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