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[SYCL][NFC] Fix clang format in SYCL.h and ClangLinkerWrapper.cpp (#1…
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…6066)

Signed-off-by: jinge90 <[email protected]>
Co-authored-by: Michael Toguchi <[email protected]>
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jinge90 and mdtoguchi authored Nov 15, 2024
1 parent c2dab05 commit b03552a
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Showing 2 changed files with 25 additions and 19 deletions.
31 changes: 17 additions & 14 deletions clang/lib/Driver/ToolChains/SYCL.h
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
//===--- SYCL.h - SYCL ToolChain Implementations -----------------*- C++ -*-===//
//===--- SYCL.h - SYCL ToolChain Implementations ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
Expand Down Expand Up @@ -158,8 +158,8 @@ SmallVector<std::string, 8> getDeviceLibraries(const Compilation &C,
bool IsSpirvAOT);

// Populates the SYCL device traits macros.
void populateSYCLDeviceTraitsMacrosArgs(Compilation &C,
const llvm::opt::ArgList &Args,
void populateSYCLDeviceTraitsMacrosArgs(
Compilation &C, const llvm::opt::ArgList &Args,
const SmallVectorImpl<std::pair<const ToolChain *, StringRef>> &Targets);

bool shouldDoPerObjectFileLinking(const Compilation &C);
Expand All @@ -180,11 +180,11 @@ class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
private:
/// \return llvm-link output file name.
const char *constructLLVMLinkCommand(Compilation &C, const JobAction &JA,
const InputInfo &Output,
const llvm::opt::ArgList &Args,
llvm::StringRef SubArchName,
llvm::StringRef OutputFilePrefix,
const InputInfoList &InputFiles) const;
const InputInfo &Output,
const llvm::opt::ArgList &Args,
llvm::StringRef SubArchName,
llvm::StringRef OutputFilePrefix,
const InputInfoList &InputFiles) const;
};

/// Directly call FPGA Compiler and Linker
Expand Down Expand Up @@ -241,7 +241,7 @@ template <auto GPUArh> std::optional<StringRef> isGPUTarget(StringRef Target) {
if (Target.starts_with(GPUArh)) {
return resolveGenDevice(Target);
}
return std::nullopt;
return std::nullopt;
}

} // end namespace gen
Expand Down Expand Up @@ -280,9 +280,10 @@ class LLVM_LIBRARY_VISIBILITY SYCLToolChain : public ToolChain {
llvm::opt::DerivedArgList *
TranslateArgs(const llvm::opt::DerivedArgList &Args, StringRef BoundArch,
Action::OffloadKind DeviceOffloadKind) const override;
void addClangTargetOptions(const llvm::opt::ArgList &DriverArgs,
llvm::opt::ArgStringList &CC1Args,
Action::OffloadKind DeviceOffloadKind) const override;
void
addClangTargetOptions(const llvm::opt::ArgList &DriverArgs,
llvm::opt::ArgStringList &CC1Args,
Action::OffloadKind DeviceOffloadKind) const override;
void AddImpliedTargetArgs(const llvm::Triple &Triple,
const llvm::opt::ArgList &Args,
llvm::opt::ArgStringList &CmdArgs,
Expand Down Expand Up @@ -324,7 +325,8 @@ class LLVM_LIBRARY_VISIBILITY SYCLToolChain : public ToolChain {
CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList &Args) const override;
void AddSYCLIncludeArgs(const llvm::opt::ArgList &DriverArgs,
llvm::opt::ArgStringList &CC1Args) const override;
void AddClangSystemIncludeArgs(const llvm::opt::ArgList &DriverArgs,
void
AddClangSystemIncludeArgs(const llvm::opt::ArgList &DriverArgs,
llvm::opt::ArgStringList &CC1Args) const override;
void AddClangCXXStdlibIncludeArgs(
const llvm::opt::ArgList &Args,
Expand Down Expand Up @@ -357,7 +359,8 @@ inline bool isSYCLNativeCPU(const llvm::opt::ArgList &Args) {
return false;
}

inline bool isSYCLNativeCPU(const llvm::Triple &HostT, const llvm::Triple &DevT) {
inline bool isSYCLNativeCPU(const llvm::Triple &HostT,
const llvm::Triple &DevT) {
return HostT == DevT;
}

Expand Down
13 changes: 8 additions & 5 deletions clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1112,8 +1112,10 @@ wrapSYCLBinariesFromFile(std::vector<module_split::SplitModule> &SplitModules,
if (!MBOrDesc)
return createFileError(SI.ModuleFilePath, MBOrDesc.getError());

StringRef ImageTarget = IsEmbeddedIR ? StringRef(EmbeddedIRTarget) : StringRef(RegularTarget);
Images.emplace_back(std::move(*MBOrDesc), SI.Properties, SI.Symbols, ImageTarget);
StringRef ImageTarget =
IsEmbeddedIR ? StringRef(EmbeddedIRTarget) : StringRef(RegularTarget);
Images.emplace_back(std::move(*MBOrDesc), SI.Properties, SI.Symbols,
ImageTarget);
}

LLVMContext C;
Expand Down Expand Up @@ -1198,7 +1200,8 @@ static Expected<StringRef> runCompile(StringRef &InputFile,
static Expected<StringRef>
runWrapperAndCompile(std::vector<module_split::SplitModule> &SplitModules,
const ArgList &Args, bool IsEmbeddedIR = false) {
auto OutputFile = sycl::wrapSYCLBinariesFromFile(SplitModules, Args, IsEmbeddedIR);
auto OutputFile =
sycl::wrapSYCLBinariesFromFile(SplitModules, Args, IsEmbeddedIR);
if (!OutputFile)
return OutputFile.takeError();
// call to clang
Expand Down Expand Up @@ -2417,8 +2420,8 @@ Expected<SmallVector<StringRef>> linkAndWrapDeviceFiles(
// of sycl-post-link (filetable referencing LLVM Bitcode + symbols)
// through the offload wrapper and link the resulting object to the
// application.
auto OutputFile =
sycl::runWrapperAndCompile(SplitModules, LinkerArgs, /* IsEmbeddedIR */ true);
auto OutputFile = sycl::runWrapperAndCompile(SplitModules, LinkerArgs,
/* IsEmbeddedIR */ true);
if (!OutputFile)
return OutputFile.takeError();
WrappedOutput.push_back(*OutputFile);
Expand Down

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