Xtensa fix

MCInst.c

@@ -179,12 +179,6 @@ void MCOperand_setFPImm(MCOperand *op, double Val)
 	op->FPImmVal = Val;
 }
 
-int64_t MCOperand_getExpr(const MCOperand *MC)
-{
-	CS_ASSERT(MC->Kind == kExpr);
-	return MC->ImmVal;
-}
-
 MCOperand *MCOperand_CreateReg1(MCInst *mcInst, unsigned Reg)
 {
 	MCOperand *op = &(mcInst->Operands[MCINST_CACHE]);

MCInst.h

@@ -84,8 +84,6 @@ const MCInst *MCOperand_getInst(const MCOperand *op);
 
 void MCOperand_setInst(MCOperand *op, const MCInst *Val);
 
-int64_t MCOperand_getExpr(const MCOperand *MC);
-
 // create Reg operand in the next slot
 void MCOperand_CreateReg0(MCInst *inst, unsigned Reg);
 

arch/Xtensa/XtensaMapping.c

@@ -216,7 +216,6 @@ void Xtensa_add_cs_detail(MCInst *MI, xtensa_op_group op_group, va_list args)
 	} break;
 	}
 
-	const map_insn_ops *ops = insn_operands + MCInst_getOpcode(MI);
-	xop->access = (ops->ops + op_num)->access;
+	xop->access = map_get_op_access(MI, op_num);
 	Xtensa_inc_op_count(MI);
 }

arch/Xtensa/XtensaMapping.h

@@ -4,6 +4,8 @@
 #ifndef XTENSA_MAPPING_H
 #define XTENSA_MAPPING_H
 
+#include "../../Mapping.h"
+
 typedef enum {
 #include "XtensaGenCSOpGroup.inc"
 } xtensa_op_group;
@@ -26,7 +28,7 @@ void Xtensa_add_cs_detail(MCInst *MI, xtensa_op_group op_group, va_list args);
 
 static inline void add_cs_detail(MCInst *MI, xtensa_op_group op_group, ...)
 {
-	if (!MI->flat_insn->detail)
+	if (!detail_is_set(MI))
 		return;
 	va_list args;
 	va_start(args, op_group);

cs.c

@@ -258,7 +258,9 @@ typedef struct cs_arch_config {
 	}
 #define CS_ARCH_CONFIG_XTENSA \
 	{ \
-		Xtensa_global_init, Xtensa_option, ~(CS_MODE_XTENSA), \
+		Xtensa_global_init, \
+		Xtensa_option, \
+		~(CS_MODE_XTENSA), \
 	}
 
 #ifdef CAPSTONE_USE_ARCH_REGISTRATION
@@ -365,8 +367,8 @@ static const cs_arch_config arch_configs[MAX_ARCH] = {
 	{
 		HPPA_global_init,
 		HPPA_option,
-		~(CS_MODE_LITTLE_ENDIAN | CS_MODE_BIG_ENDIAN | CS_MODE_HPPA_11
-		| CS_MODE_HPPA_20 | CS_MODE_HPPA_20W),
+		~(CS_MODE_LITTLE_ENDIAN | CS_MODE_BIG_ENDIAN | CS_MODE_HPPA_11 |
+		  CS_MODE_HPPA_20 | CS_MODE_HPPA_20W),
 	},
 #else
 	{ NULL, NULL, 0 },
@@ -386,72 +388,72 @@ static const cs_arch_config arch_configs[MAX_ARCH] = {
 // bitmask of enabled architectures
 static const uint32_t all_arch = 0
 #ifdef CAPSTONE_HAS_ARM
-	| (1 << CS_ARCH_ARM)
+				 | (1 << CS_ARCH_ARM)
 #endif
 #if defined(CAPSTONE_HAS_AARCH64) || defined(CAPSTONE_HAS_ARM64)
-	| (1 << CS_ARCH_AARCH64)
+				 | (1 << CS_ARCH_AARCH64)
 #endif
 #ifdef CAPSTONE_HAS_MIPS
-	| (1 << CS_ARCH_MIPS)
+				 | (1 << CS_ARCH_MIPS)
 #endif
 #ifdef CAPSTONE_HAS_X86
-	| (1 << CS_ARCH_X86)
+				 | (1 << CS_ARCH_X86)
 #endif
 #ifdef CAPSTONE_HAS_POWERPC
-	| (1 << CS_ARCH_PPC)
+				 | (1 << CS_ARCH_PPC)
 #endif
 #ifdef CAPSTONE_HAS_SPARC
-	| (1 << CS_ARCH_SPARC)
+				 | (1 << CS_ARCH_SPARC)
 #endif
 #ifdef CAPSTONE_HAS_SYSTEMZ
-	| (1 << CS_ARCH_SYSTEMZ)
+				 | (1 << CS_ARCH_SYSTEMZ)
 #endif
 #ifdef CAPSTONE_HAS_XCORE
-	| (1 << CS_ARCH_XCORE)
+				 | (1 << CS_ARCH_XCORE)
 #endif
 #ifdef CAPSTONE_HAS_M68K
-	| (1 << CS_ARCH_M68K)
+				 | (1 << CS_ARCH_M68K)
 #endif
 #ifdef CAPSTONE_HAS_TMS320C64X
-	| (1 << CS_ARCH_TMS320C64X)
+				 | (1 << CS_ARCH_TMS320C64X)
 #endif
 #ifdef CAPSTONE_HAS_M680X
-	| (1 << CS_ARCH_M680X)
+				 | (1 << CS_ARCH_M680X)
 #endif
 #ifdef CAPSTONE_HAS_EVM
-	| (1 << CS_ARCH_EVM)
+				 | (1 << CS_ARCH_EVM)
 #endif
 #ifdef CAPSTONE_HAS_MOS65XX
-	| (1 << CS_ARCH_MOS65XX)
+				 | (1 << CS_ARCH_MOS65XX)
 #endif
 #ifdef CAPSTONE_HAS_WASM
-	| (1 << CS_ARCH_WASM)
+				 | (1 << CS_ARCH_WASM)
 #endif
 #ifdef CAPSTONE_HAS_BPF
-	| (1 << CS_ARCH_BPF)
+				 | (1 << CS_ARCH_BPF)
 #endif
 #ifdef CAPSTONE_HAS_RISCV
-	| (1 << CS_ARCH_RISCV)
+				 | (1 << CS_ARCH_RISCV)
 #endif
 #ifdef CAPSTONE_HAS_SH
-	| (1 << CS_ARCH_SH)
+				 | (1 << CS_ARCH_SH)
 #endif
 #ifdef CAPSTONE_HAS_TRICORE
-	| (1 << CS_ARCH_TRICORE)
+				 | (1 << CS_ARCH_TRICORE)
 #endif
 #ifdef CAPSTONE_HAS_ALPHA
-	| (1 << CS_ARCH_ALPHA)
+				 | (1 << CS_ARCH_ALPHA)
 #endif
 #ifdef CAPSTONE_HAS_HPPA
-	| (1 << CS_ARCH_HPPA)
+				 | (1 << CS_ARCH_HPPA)
 #endif
 #ifdef CAPSTONE_HAS_LOONGARCH
-	| (1 << CS_ARCH_LOONGARCH)
+				 | (1 << CS_ARCH_LOONGARCH)
 #endif
 #ifdef CAPSTONE_HAS_XTENSA
 				 | (1 << CS_ARCH_XTENSA)
 #endif
-;
+	;
 #endif
 
 
@@ -683,17 +685,17 @@ bool CAPSTONE_API cs_support(int query)
 {
 	if (query == CS_ARCH_ALL)
 		return all_arch ==
-				    ((1 << CS_ARCH_ARM)  | (1 << CS_ARCH_AARCH64)    |
-				    (1 << CS_ARCH_MIPS)  | (1 << CS_ARCH_X86)        |
-				    (1 << CS_ARCH_PPC)   | (1 << CS_ARCH_SPARC)      |
-				    (1 << CS_ARCH_SYSTEMZ)  | (1 << CS_ARCH_XCORE)      |
-				    (1 << CS_ARCH_M68K)  | (1 << CS_ARCH_TMS320C64X) |
-				    (1 << CS_ARCH_M680X) | (1 << CS_ARCH_EVM)        |
-				    (1 << CS_ARCH_RISCV) | (1 << CS_ARCH_MOS65XX)    |
-				    (1 << CS_ARCH_WASM)  | (1 << CS_ARCH_BPF)        |
-				    (1 << CS_ARCH_SH)    | (1 << CS_ARCH_TRICORE)    |
-				    (1 << CS_ARCH_ALPHA) | (1 << CS_ARCH_HPPA)       |
-				    (1 << CS_ARCH_LOONGARCH) | (1 << CS_ARCH_XTENSA));
+		       ((1 << CS_ARCH_ARM) | (1 << CS_ARCH_AARCH64) |
+			(1 << CS_ARCH_MIPS) | (1 << CS_ARCH_X86) |
+			(1 << CS_ARCH_PPC) | (1 << CS_ARCH_SPARC) |
+			(1 << CS_ARCH_SYSTEMZ) | (1 << CS_ARCH_XCORE) |
+			(1 << CS_ARCH_M68K) | (1 << CS_ARCH_TMS320C64X) |
+			(1 << CS_ARCH_M680X) | (1 << CS_ARCH_EVM) |
+			(1 << CS_ARCH_RISCV) | (1 << CS_ARCH_MOS65XX) |
+			(1 << CS_ARCH_WASM) | (1 << CS_ARCH_BPF) |
+			(1 << CS_ARCH_SH) | (1 << CS_ARCH_TRICORE) |
+			(1 << CS_ARCH_ALPHA) | (1 << CS_ARCH_HPPA) |
+			(1 << CS_ARCH_LOONGARCH) | (1 << CS_ARCH_XTENSA));
 
 	if ((unsigned int)query < CS_ARCH_MAX)
 		return all_arch & (1 << query);

cstool/cstool.c

@@ -343,11 +343,6 @@ static void usage(char *prog)
 		printf(")\n");
 	}
 
-	if (cs_support(CS_ARCH_XTENSA)) {
-		printf("        xtensa      Xtensa\n");
-		printf("        xtensabe    Xtensa + big endian\n");
-	}
-
 	printf("\nExtra options:\n");
 	printf("        -d show detailed information of the instructions\n");
 	printf("        -r show detailed information of the real instructions (even for alias)\n");

cstool/cstool.h

@@ -22,6 +22,6 @@ void print_insn_detail_tricore(csh handle, cs_insn *ins);
 void print_insn_detail_alpha(csh handle, cs_insn *ins);
 void print_insn_detail_hppa(csh handle, cs_insn *ins);
 void print_insn_detail_loongarch(csh handle, cs_insn *ins);
-#include "cstool_xtensa.inc"
+void print_insn_detail_xtensa(csh handle, cs_insn *ins);
 
 #endif //CAPSTONE_CSTOOL_CSTOOL_H_

cstool/cstool_xtensa.inc → cstool/cstool_xtensa.c

@@ -4,7 +4,7 @@
 #include <stdio.h>
 #include <capstone/capstone.h>
 
-static inline void print_insn_detail_xtensa(csh handle, cs_insn *ins)
+void print_insn_detail_xtensa(csh handle, cs_insn *ins)
 {
 	int i;
 	cs_regs regs_read, regs_write;

include/capstone/capstone.h

@@ -284,7 +284,6 @@ typedef enum cs_mode {
 	CS_MODE_SYSTEMZ_Z16 = 1 << 14, ///< Enables features of the Z16 processor
 	CS_MODE_SYSTEMZ_GENERIC = 1 << 15, ///< Enables features of the generic processor
 	CS_MODE_XTENSA = 1 << 1, ///< Xtensa
-	CS_MODE_XTENSA = 1 << 0, ///< Xtensa
 } cs_mode;
 
 typedef void* (CAPSTONE_API *cs_malloc_t)(size_t size);

suite/auto-sync/src/autosync/ASUpdater.py

@@ -56,21 +56,12 @@ def __init__(
         self.inc_list = inc_list
         self.wait_for_user = wait_for_user
         if USteps.ALL in steps:
-            if arch not in ["Xtensa"]:
-                self.steps = [
+            self.steps = [
                     USteps.INC_GEN,
                     USteps.TRANS,
                     USteps.DIFF,
-                    USteps.MC,
                     USteps.PATCH_HEADER,
-                ]
-            else:
-                self.steps = [
-                    USteps.INC_GEN,
-                    USteps.TRANS,
-                    USteps.DIFF,
-                    USteps.PATCH_HEADER,
-                ]
+            ]
         else:
             self.steps = steps
         self.copy_translated = copy_translated

suite/auto-sync/src/autosync/MCUpdater.py

@@ -480,7 +480,9 @@ def extract_llvm_mc_cmds(self, cmds: str) -> list[LLVM_MC_Command]:
     def gen_all(self):
         log.info("Check prerequisites")
         disas_tests = self.mc_dir.joinpath(f"Disassembler/{self.arch}")
-        test_paths = [disas_tests, self.mc_dir.joinpath(self.arch)]
+        test_paths = [disas_tests]
+        if self.arch == "Xtensa":
+            test_paths.append(self.mc_dir.joinpath(self.arch))
         self.check_prerequisites(test_paths)
         log.info("Generate MC regression tests")
         llvm_mc_cmds = self.run_llvm_lit(

suite/cstest/src/test_run.c

@@ -123,7 +123,8 @@ static bool parse_input_options(const TestInput *input, cs_arch *arch,
 					fprintf(stderr,
 						"Too many options given in: '%s'. Maximum is: %" PRId64
 						"\n",
-						opt_str, (uint64_t)opt_arr_size);
+						opt_str,
+						(uint64_t)opt_arr_size);
 					return false;
 				}
 				opt_arr[opt_idx++] = test_option_map[k].opt;