Fix tricore

imbillow · Nov 20, 2023 · eea6255 · eea6255
1 parent af8415e
commit eea6255
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Showing 10 changed files with 17 additions and 17 deletions.
diff --git a/bindings/python/capstone/tricore.py b/bindings/python/capstone/tricore.py
@@ -7,14 +7,14 @@
 class TriCoreOpMem(ctypes.Structure):
     _fields_ = (
         ('base', ctypes.c_uint8),
-        ('disp', ctypes.c_int32),
+        ('disp', ctypes.c_int64),
     )
 
 
 class TriCoreOpValue(ctypes.Union):
     _fields_ = (
         ('reg', ctypes.c_uint),
-        ('imm', ctypes.c_int32),
+        ('imm', ctypes.c_int64),
         ('mem', TriCoreOpMem),
     )
 

diff --git a/cstool/cstool_tricore.c b/cstool/cstool_tricore.c
@@ -1,5 +1,4 @@
 #include <stdio.h>
-#include <stdlib.h>
 
 #include <capstone/capstone.h>
 #include "cstool.h"
@@ -30,13 +29,13 @@ void print_insn_detail_tricore(csh handle, cs_insn *ins)
 			       cs_reg_name(handle, op->reg));
 			break;
 		case TRICORE_OP_IMM:
-			printf("\t\toperands[%u].type: IMM = 0x%x\n", i,
-			       op->imm);
+			printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n",
+			       i, op->imm);
 			break;
 		case TRICORE_OP_MEM:
 			printf("\t\toperands[%u].type: MEM\n"
 			       "\t\t\t.mem.base: REG = %s\n"
-			       "\t\t\t.mem.disp: 0x%x\n",
+			       "\t\t\t.mem.disp: 0x%" PRIx64 "\n",
 			       i, cs_reg_name(handle, op->mem.base),
 			       op->mem.disp);
 			break;

diff --git a/suite/MC/TriCore/tc110.s.cs b/suite/MC/TriCore/tc110.s.cs
@@ -293,7 +293,7 @@
 0xc5, 0x00, 0x00, 0x00 = lea a0, #0
 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0
 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0
-0xfc, 0x00 = loop a0, #-0x20
+0xfc, 0x00 = loop a0, #0xffffffe0
 0xfd, 0x00, 0x00, 0x00 = loop a0, #0
 0x7a, 0x00 = lt d15, d0, d0
 0xfa, 0x00 = lt d15, d0, #0

diff --git a/suite/MC/TriCore/tc120.s.cs b/suite/MC/TriCore/tc120.s.cs
@@ -291,7 +291,7 @@
 0xc5, 0x00, 0x00, 0x00 = lea a0, #0
 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0
 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0
-0xfc, 0x00 = loop a0, #-0x20
+0xfc, 0x00 = loop a0, #0xffffffe0
 0xfd, 0x00, 0x00, 0x00 = loop a0, #0
 0xfd, 0x00, 0x00, 0x80 = loopu #0
 0x7a, 0x00 = lt d15, d0, d0

diff --git a/suite/MC/TriCore/tc130.s.cs b/suite/MC/TriCore/tc130.s.cs
@@ -303,7 +303,7 @@
 0xc5, 0x00, 0x00, 0x00 = lea a0, #0
 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0
 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0
-0xfc, 0x00 = loop a0, #-0x20
+0xfc, 0x00 = loop a0, #0xffffffe0
 0xfd, 0x00, 0x00, 0x00 = loop a0, #0
 0xfd, 0x00, 0x00, 0x80 = loopu #0
 0x7a, 0x00 = lt d15, d0, d0

diff --git a/suite/MC/TriCore/tc131.s.cs b/suite/MC/TriCore/tc131.s.cs
@@ -312,7 +312,7 @@
 0xc5, 0x00, 0x00, 0x00 = lea a0, #0
 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0
 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0
-0xfc, 0x00 = loop a0, #-0x20
+0xfc, 0x00 = loop a0, #0xffffffe0
 0xfd, 0x00, 0x00, 0x00 = loop a0, #0
 0xfd, 0x00, 0x00, 0x80 = loopu #0
 0x7a, 0x00 = lt d15, d0, d0

diff --git a/suite/MC/TriCore/tc160.s.cs b/suite/MC/TriCore/tc160.s.cs
@@ -331,7 +331,7 @@
 0xc5, 0x00, 0x00, 0x00 = lea a0, #0
 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0
 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0
-0xfc, 0x00 = loop a0, #-0x20
+0xfc, 0x00 = loop a0, #0xffffffe0
 0xfd, 0x00, 0x00, 0x00 = loop a0, #0
 0xfd, 0x00, 0x00, 0x80 = loopu #0
 0x7a, 0x00 = lt d15, d0, d0

diff --git a/suite/MC/TriCore/tc161.s.cs b/suite/MC/TriCore/tc161.s.cs
@@ -337,7 +337,7 @@
 0xc5, 0x00, 0x00, 0x00 = lea a0, #0
 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0
 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0
-0xfc, 0x00 = loop a0, #-0x20
+0xfc, 0x00 = loop a0, #0xffffffe0
 0xfd, 0x00, 0x00, 0x00 = loop a0, #0
 0xfd, 0x00, 0x00, 0x80 = loopu #0
 0x7a, 0x00 = lt d15, d0, d0

diff --git a/suite/MC/TriCore/tc162.s.cs b/suite/MC/TriCore/tc162.s.cs
@@ -343,7 +343,7 @@
 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0
 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0
 0xc5, 0x00, 0x00, 0x04 = lha a0, #0
-0xfc, 0x00 = loop a0, #-0x20
+0xfc, 0x00 = loop a0, #0xffffffe0
 0xfd, 0x00, 0x00, 0x00 = loop a0, #0
 0xfd, 0x00, 0x00, 0x80 = loopu #0
 0x7a, 0x00 = lt d15, d0, d0

diff --git a/tests/test_tricore.c b/tests/test_tricore.c
@@ -51,17 +51,18 @@ static void print_insn_detail(cs_insn *ins)
 			       cs_reg_name(handle, op->reg));
 			break;
 		case TRICORE_OP_IMM:
-			printf("\t\toperands[%u].type: IMM = 0x%x\n", i,
-			       op->imm);
+			printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n",
+			       i, op->imm);
 			break;
 		case TRICORE_OP_MEM:
 			printf("\t\toperands[%u].type: MEM\n", i);
 			if (op->mem.base != TRICORE_REG_INVALID)
 				printf("\t\t\toperands[%u].mem.base: REG = %s\n",
 				       i, cs_reg_name(handle, op->mem.base));
 			if (op->mem.disp != 0)
-				printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i,
-				       op->mem.disp);
+				printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64
+				       "\n",
+				       i, op->mem.disp);
 
 			break;
 		}