Xtensa: add MC test

suite/MC/Xtensa/arith.s.cs

@@ -0,0 +1,17 @@
+# CS_ARCH_XTENSA, CS_MODE_LITTLE_ENDIAN, None
+0x60,0x51,0x60	=	abs a5, a6
+0x40,0x39,0x80	=	add a3, a9, a4
+0x10,0xf9,0x80	=	add a15, a9, a1
+0x82,0xc1,0x80	=	addi a8, a1, -128
+0x82,0xc1,0xf4	=	addi a8, a1, -12
+0x12,0xd2,0x7f	=	addmi a1, a2, 32512
+0x50,0x21,0x90	=	addx2 a2, a1, a5
+0x60,0x31,0x0	=	addx4 a3, a1, a6
+0x70,0x41,0xb0	=	addx8 a4, a1, a7
+0x30,0x10,0x60	=	neg a1, a3
+0x60,0x45,0x20	=	or a4, a5, a6
+0x10,0x82,0xc0	=	sub a8, a2, a1
+0x50,0x21,0xd0	=	subx2 a2, a1, a5
+0x60,0x31,0xe0	=	subx4 a3, a1, a6
+0x70,0x41,0xf0	=	subx8 a4, a1, a7
+0x50,0x64,0x30	=	xor a6, a4, a5

suite/MC/Xtensa/branch.s.cs

@@ -0,0 +1,32 @@
+# CS_ARCH_XTENSA, CS_MODE_LITTLE_ENDIAN, None
+0x37,0x41,0x0	=	ball    a1, a3, LBL0
+0xd7,0x88,0x0	=	bany    a8, a13, LBL0
+0x77,0x58,0x0	=	bbc     a8, a7, LBL0
+0x7,0x73,0x0	=	bbci    a3, 16, LBL0
+0x7,0x73,0x0	=	bbci    a3, 16, LBL0
+0x57,0xdc,0x0	=	bbs     a12, a5, LBL0
+0x7,0xf3,0x0	=	bbsi    a3, 16, LBL0
+0x37,0xc7,0x0	=	bnall   a7, a3, LBL0
+0x47,0x2,0x0	=	bnone   a2, a4, LBL0
+0x27,0x11,0x0	=	beq     a1, a2, LBL0
+0x57,0x1b,0x0	=	beq     a11, a5, LBL0
+0x26,0xf1,0x0	=	beqi    a1, 256, LBL0
+0x26,0xb,0x0	=	beqi    a11, -1, LBL0
+0x16,0x8,0x0	=	beqz    a8, LBL0
+0x27,0xe,0x0	=	bge     a14, a2, LBL0
+0xe6,0xb,0x0	=	bgei    a11, -1, LBL0
+0xe6,0xeb,0x0	=	bgei    a11, 128, LBL0
+0x27,0xbe,0x0	=	bgeu    a14, a2, LBL0
+0x17,0xbd,0x0	=	bgeu    a13, a1, LBL0
+0xf6,0x9,0x0	=	bgeui   a9, 32768, LBL0
+0xf6,0x17,0x0	=	bgeui   a7, 65536, LBL0
+0xf6,0xd7,0x0	=	bgeui   a7, 64, LBL0
+0xd6,0x8,0x0	=	bgez    a8, LBL0
+0x27,0x2e,0x0	=	blt     a14, a2, LBL0
+0x6,0xc,0x0	=	blti    a12, -1, LBL0
+0x6,0xc0,0x0	=	blti    a0, 32, LBL0
+0xb6,0xb7,0x0	=	bltui   a7, 16, LBL0
+0x96,0x6,0x0	=	bltz    a6, LBL0
+0x47,0x93,0x0	=	bne     a3, a4, LBL0
+0x66,0x5,0x0	=	bnei    a5, 12, LBL0
+0x56,0x5,0x0	=	bnez    a5, LBL0

suite/MC/Xtensa/call-jump.s.cs

@@ -0,0 +1,6 @@
+# CS_ARCH_XTENSA, CS_MODE_LITTLE_ENDIAN, None
+0x5,0x0,0x0	=	call0   LBL0
+0xc0,0x1,0x0	=	callx0  a1
+0x6,0x0,0x0	=	j       LBL0
+0x0,0x2,0x0	=	jx      a2
+0x80,0x0,0x0	=	ret

suite/MC/Xtensa/memorder.s.cs

@@ -0,0 +1,3 @@
+# CS_ARCH_XTENSA, CS_MODE_LITTLE_ENDIAN, None
+0xd0,0x20,0x0	=	extw
+0xc0,0x20,0x0	=	memw

suite/MC/Xtensa/memory.s.cs

@@ -0,0 +1,8 @@
+# CS_ARCH_XTENSA, CS_MODE_LITTLE_ENDIAN, None
+0x22,0x1,0x3	=	l8ui a2, a1, 3
+0x32,0x91,0x2	=	l16si a3, a1, 4
+0x42,0x11,0x3	=	l16ui a4, a1, 6
+0x52,0x21,0x2	=	l32i a5, a1, 8
+0x22,0x41,0x3	=	s8i a2, a1, 3
+0x32,0x51,0x2	=	s16i a3, a1, 4
+0x52,0x61,0x2	=	s32i a5, a1, 8

suite/MC/Xtensa/move.s.cs

@@ -0,0 +1,6 @@
+# CS_ARCH_XTENSA, CS_MODE_LITTLE_ENDIAN, None
+0x40,0x23,0x83	=	moveqz a2, a3, a4
+0xc0,0x3b,0xb3	=	movgez a3, a11, a12
+0x12,0x8,0x0	=	movi a1, -2048
+0x90,0x78,0x3	=	movltz a7, a8, a9
+0xc0,0xb,0x93	=	movnez a10, a11, a12

suite/MC/Xtensa/processor-control.s.cs

@@ -0,0 +1,15 @@
+# CS_ARCH_XTENSA, CS_MODE_LITTLE_ENDIAN, None
+0x30,0x20,0x0	=	dsync
+0x20,0x20,0x0	=	esync
+0x0,0x20,0x0	=	isync
+0xf0,0x20,0x0	=	nop
+0x80,0x3,0x3	=	rsr a8, sar
+0x80,0x3,0x3	=	rsr a8, sar
+0x80,0x3,0x3	=	rsr a8, sar
+0x10,0x20,0x0	=	rsync
+0x80,0x3,0x13	=	wsr a8, sar
+0x80,0x3,0x13	=	wsr a8, sar
+0x80,0x3,0x13	=	wsr a8, sar
+0x80,0x3,0x61	=	xsr a8, sar
+0x80,0x3,0x61	=	xsr a8, sar
+0x80,0x3,0x61	=	xsr a8, sar

suite/MC/Xtensa/shift.s.cs

@@ -0,0 +1,13 @@
+# CS_ARCH_XTENSA, CS_MODE_LITTLE_ENDIAN, None
+0x20,0x17,0x74	=	extui a1, a2, 7, 8
+0x0,0xb,0x1	=	sll a10, a11
+0x10,0x51,0x11	=	slli a5, a1, 15
+0x30,0xc0,0xb1	=	sra a12, a3
+0x50,0x80,0x21	=	srai a8, a5, 0
+0x50,0x34,0x81	=	src a3, a4, a5
+0x70,0x60,0x91	=	srl a6, a7
+0x40,0x38,0x41	=	srli a3, a4, 8
+0x0,0x2e,0x40	=	ssa8l a14
+0x10,0x4f,0x40	=	ssai 31
+0x0,0x10,0x40	=	ssl a0
+0x0,0x2,0x40	=	ssr a2